Lines Matching refs:NVT
201 SDNode *selectAtomicLoadArith(SDNode *Node, MVT NVT);
1852 enum AtomicOpc &Op, MVT NVT,
1865 return CurDAG->getTargetConstant(CNVal, dl, NVT);
1880 return CurDAG->getTargetConstant(CNVal, dl, NVT);
1893 if (Val.getOpcode() == ISD::TRUNCATE && NVT == MVT::i16 &&
1898 return CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl, NVT,
1906 SDNode *X86DAGToDAGISel::selectAtomicLoadArith(SDNode *Node, MVT NVT) {
1941 Val = getAtomicLoadArithTargetConstant(CurDAG, dl, Op, NVT, Val, Subtarget);
1946 switch (NVT.SimpleTy) {
2006 dl, NVT), 0);
2209 MVT NVT = Node->getSimpleValueType(0);
2314 SDNode *RetVal = selectAtomicLoadArith(Node, NVT);
2331 if (NVT != MVT::i32 && NVT != MVT::i64)
2349 MVT CstVT = NVT;
2361 if (NVT == CstVT)
2364 switch (NVT.SimpleTy) {
2394 SDNode *New = CurDAG->getMachineNode(Op, dl, NVT, N0->getOperand(0),NewCst);
2396 return CurDAG->SelectNodeTo(Node, AddOp, NVT, SDValue(New, 0),
2398 return CurDAG->SelectNodeTo(Node, ShlOp, NVT, SDValue(New, 0),
2411 SDVTList VTs = CurDAG->getVTList(NVT, MVT::i32);
2425 switch (NVT.SimpleTy) {
2436 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::i32);
2454 switch (NVT.SimpleTy) {
2464 switch (NVT.SimpleTy) {
2518 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::Other, MVT::Glue);
2536 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::Glue);
2573 ResLo = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, LoReg, NVT,
2584 ResHi = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, HiReg, NVT,
2605 switch (NVT.SimpleTy) {
2613 switch (NVT.SimpleTy) {
2624 switch (NVT.SimpleTy) {
2650 if (NVT == MVT::i8 && (!isSigned || signBitIsZero)) {
2678 SDValue ClrNode = SDValue(CurDAG->getMachineNode(X86::MOV32r0, dl, NVT), 0);
2679 switch (NVT.SimpleTy) {
2763 LoReg, NVT, InFlag);
2771 HiReg, NVT, InFlag);
