Lines Matching refs:getOpcode
2045 switch (MI.getOpcode()) {
2065 switch (MI.getOpcode()) {
2093 if (MI->getOpcode() == getCallFrameSetupOpcode() ||
2094 MI->getOpcode() == getCallFrameDestroyOpcode()) {
2101 if (MI->getOpcode() == getCallFrameSetupOpcode())
2114 if (I->getOpcode() == getCallFrameDestroyOpcode() ||
2121 if (I->getOpcode() != getCallFrameDestroyOpcode())
2129 switch (MI->getOpcode()) {
2227 if (isFrameLoadOpcode(MI->getOpcode()))
2235 if (isFrameLoadOpcode(MI->getOpcode())) {
2248 if (isFrameStoreOpcode(MI->getOpcode()))
2257 if (isFrameStoreOpcode(MI->getOpcode())) {
2277 if (DefMI->getOpcode() != X86::MOVPC32r)
2288 switch (MI->getOpcode()) {
2487 switch (Orig->getOpcode()) {
2753 unsigned MIOpc = MI->getOpcode();
3150 switch (MI->getOpcode()) {
3159 switch (MI->getOpcode()) {
3190 switch (MI->getOpcode()) {
3296 switch (MI->getOpcode()) {
3356 if (isFMA3(MI->getOpcode())) {
3434 unsigned Opc = MI->getOpcode();
3623 switch (MI->getOpcode()) {
3645 if (isFMA3(MI->getOpcode()))
3927 if (I->getOpcode() == X86::JMP_1) {
3957 X86::CondCode BranchCode = getCondFromBranchOpc(I->getOpcode());
4111 if (ConditionDef->getOpcode() == TestOpcode &&
4134 if (I->getOpcode() != X86::JMP_1 &&
4135 getCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID)
4583 int MemRefBegin = X86II::getMemoryOperandNo(Desc.TSFlags, MemOp->getOpcode());
4699 switch (MI->getOpcode()) {
4777 if (((FlagI->getOpcode() == X86::CMP64rr &&
4778 OI->getOpcode() == X86::SUB64rr) ||
4779 (FlagI->getOpcode() == X86::CMP32rr &&
4780 OI->getOpcode() == X86::SUB32rr)||
4781 (FlagI->getOpcode() == X86::CMP16rr &&
4782 OI->getOpcode() == X86::SUB16rr)||
4783 (FlagI->getOpcode() == X86::CMP8rr &&
4784 OI->getOpcode() == X86::SUB8rr)) &&
4791 if (((FlagI->getOpcode() == X86::CMP64ri32 &&
4792 OI->getOpcode() == X86::SUB64ri32) ||
4793 (FlagI->getOpcode() == X86::CMP64ri8 &&
4794 OI->getOpcode() == X86::SUB64ri8) ||
4795 (FlagI->getOpcode() == X86::CMP32ri &&
4796 OI->getOpcode() == X86::SUB32ri) ||
4797 (FlagI->getOpcode() == X86::CMP32ri8 &&
4798 OI->getOpcode() == X86::SUB32ri8) ||
4799 (FlagI->getOpcode() == X86::CMP16ri &&
4800 OI->getOpcode() == X86::SUB16ri) ||
4801 (FlagI->getOpcode() == X86::CMP16ri8 &&
4802 OI->getOpcode() == X86::SUB16ri8) ||
4803 (FlagI->getOpcode() == X86::CMP8ri &&
4804 OI->getOpcode() == X86::SUB8ri)) &&
4814 switch (MI->getOpcode()) {
4899 switch (MI->getOpcode()) {
4925 switch (CmpInstr->getOpcode()) {
4945 switch (CmpInstr->getOpcode()) {
5043 if (!Movr0Inst && Instr->getOpcode() == X86::MOV32r0 &&
5087 OldCC = getCondFromBranchOpc(Instr.getOpcode());
5089 OldCC = getCondFromSETOpc(Instr.getOpcode());
5093 OldCC = X86::getCondFromCMovOpc(Instr.getOpcode());
5310 assert(MIB->getOpcode() == X86::MOV64ImmSExti8 ||
5311 MIB->getOpcode() == X86::MOV32ImmSExti8);
5320 assert(MIB->getOpcode() == X86::MOV32ImmSExti8);
5369 switch (MI->getOpcode()) {
5511 switch (MI->getOpcode()) {
5527 (MI->getOpcode() == X86::VINSERTPSrr ? X86::VINSERTPSrm
5554 (MI->getOpcode() == X86::CALL32r || MI->getOpcode() == X86::CALL64r ||
5555 MI->getOpcode() == X86::PUSH16r || MI->getOpcode() == X86::PUSH32r ||
5556 MI->getOpcode() == X86::PUSH64r))
5565 if (MI->getOpcode() == X86::ADD32ri &&
5586 if (MI->getOpcode() == X86::MOV32r0) {
5607 OpcodeTablePtr->find(MI->getOpcode());
5779 if (OpNum != 0 || !hasPartialRegUpdate(MI->getOpcode()))
5873 if (!hasUndefRegUpdate(MI->getOpcode()))
5921 if (!MF.getFunction()->optForSize() && hasPartialRegUpdate(MI->getOpcode()))
5935 switch (MI->getOpcode()) {
5974 unsigned Opc = LoadMI.getOpcode();
5975 unsigned UserOpc = UserMI.getOpcode();
6040 if (!MF.getFunction()->optForSize() && hasPartialRegUpdate(MI->getOpcode()))
6048 switch (LoadMI->getOpcode()) {
6068 switch (MI->getOpcode()) {
6087 switch (LoadMI->getOpcode()) {
6118 unsigned Opc = LoadMI->getOpcode();
6159 MemOp2RegOpTable.find(MI->getOpcode());
6238 switch (DataMI->getOpcode()) {
6251 switch (DataMI->getOpcode()) {
6577 switch(Second->getOpcode()) {
6603 switch (First->getOpcode()) {
6854 if (domain && lookup(MI->getOpcode(), domain))
6856 else if (domain && lookupAVX2(MI->getOpcode(), domain))
6865 const uint16_t *table = lookup(MI->getOpcode(), dom);
6869 table = lookupAVX2(MI->getOpcode(), dom);
6988 return isHighLatencyDef(DefMI->getOpcode());
7018 switch (Inst.getOpcode()) {
7268 switch (I->getOpcode()) {
