Lines Matching refs:KnownZero
57 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
60 Value *V = SimplifyDemandedUseBits(&Inst, DemandedMask, KnownZero, KnownOne,
72 APInt &KnownZero, APInt &KnownOne,
75 Value *NewVal = SimplifyDemandedUseBits(U.get(), DemandedMask, KnownZero,
90 /// to be one in the expression. KnownZero contains all the bits that are known
93 /// the expression. KnownOne and KnownZero always follow the invariant that
94 /// KnownOne & KnownZero == 0. That is, a bit can't be both 1 and 0. Note that
95 /// the bits in KnownOne and KnownZero may only be accurate for those bits set
96 /// in DemandedMask. Note also that the bitwidth of V, DemandedMask, KnownZero
105 APInt &KnownZero, APInt &KnownOne,
114 KnownZero.getBitWidth() == BitWidth &&
116 "Value *V, DemandedMask, KnownZero and KnownOne "
121 KnownZero = ~KnownOne & DemandedMask;
127 KnownZero = DemandedMask;
131 KnownZero.clearAllBits();
147 computeKnownBits(V, KnownZero, KnownOne, Depth, CxtI);
156 // context, we can at least compute the knownzero/knownone bits, and we can
225 // Compute the KnownZero/KnownOne bits to simplify things downstream.
226 computeKnownBits(I, KnownZero, KnownOne, Depth, CxtI);
239 computeKnownBits(I, KnownZero, KnownOne, Depth, CxtI);
277 KnownZero = RHSKnownZero | LHSKnownZero;
318 KnownZero = RHSKnownZero & LHSKnownZero;
404 KnownZero= (RHSKnownZero & LHSKnownZero) | (RHSKnownOne & LHSKnownOne);
431 KnownZero = RHSKnownZero & LHSKnownZero;
436 KnownZero = KnownZero.zext(truncBf);
438 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMask, KnownZero,
442 KnownZero = KnownZero.trunc(BitWidth);
444 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
464 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMask, KnownZero,
467 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
474 KnownZero = KnownZero.trunc(SrcBitWidth);
476 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMask, KnownZero,
480 KnownZero = KnownZero.zext(BitWidth);
482 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
484 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth);
501 KnownZero = KnownZero.trunc(SrcBitWidth);
503 if (SimplifyDemandedBits(I->getOperandUse(0), InputDemandedBits, KnownZero,
507 KnownZero = KnownZero.zext(BitWidth);
509 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
516 if (KnownZero[SrcBitWidth-1] || (NewBits & ~DemandedMask) == NewBits) {
551 computeKnownBits(V, KnownZero, KnownOne, Depth, CxtI);
561 KnownZero, KnownOne);
577 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero,
580 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
581 KnownZero <<= ShiftAmt;
585 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
601 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero,
604 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
605 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
610 KnownZero |= HighBits; // high bits known zero.
646 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero,
649 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
652 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
662 if (BitWidth <= ShiftAmt || KnownZero[BitWidth-ShiftAmt-1] ||
692 KnownZero = LHSKnownZero & LowBits;
698 KnownZero |= ~LowBits;
705 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
711 if (DemandedMask.isNegative() && KnownZero.isNonNegative()) {
717 KnownZero.setBit(KnownZero.getBitWidth() - 1);
732 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & DemandedMask;
772 KnownZero = APInt::getHighBitsSet(64, 32);
776 computeKnownBits(V, KnownZero, KnownOne, Depth, CxtI);
782 if ((DemandedMask & (KnownZero|KnownOne)) == DemandedMask)
805 Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) {
822 KnownZero = APInt::getBitsSet(KnownZero.getBitWidth(), 0, ShlAmt-1);
823 KnownZero &= DemandedMask;
