Lines Matching full:uminv
21 declare i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32>)
23 declare i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16>)
25 declare i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8>)
33 declare i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16>)
35 declare i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8>)
273 ; CHECK: uminv b{{[0-9]+}}, {{v[0-9]+}}.8b
275 %uminv.i = tail call i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8> %a)
276 %0 = trunc i32 %uminv.i to i8
282 ; CHECK: uminv h{{[0-9]+}}, {{v[0-9]+}}.4h
284 %uminv.i = tail call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> %a)
285 %0 = trunc i32 %uminv.i to i16
317 ; CHECK: uminv b{{[0-9]+}}, {{v[0-9]+}}.16b
319 %uminv.i = tail call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> %a)
320 %0 = trunc i32 %uminv.i to i8
326 ; CHECK: uminv h{{[0-9]+}}, {{v[0-9]+}}.8h
328 %uminv.i = tail call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> %a)
329 %0 = trunc i32 %uminv.i to i16
335 ; CHECK: uminv s{{[0-9]+}}, {{v[0-9]+}}.4s
337 %uminv.i = tail call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> %a)
338 ret i32 %uminv.i
