Lines Matching refs:nvc0
40 nvc0_push_context_init(struct nvc0_context *nvc0, struct push_context *ctx)
42 ctx->push = nvc0->base.pushbuf;
44 ctx->translate = nvc0->vertex->translate;
45 ctx->vertex_size = nvc0->vertex->size;
48 nvc0->vertprog->vp.need_vertex_id && (nvc0->vertex->num_elements < 32);
51 ctx->edgeflag.enabled = nvc0->vertprog->vp.edgeflag < PIPE_MAX_ATTRIBS;
59 nvc0_vertex_configure_translate(struct nvc0_context *nvc0, int32_t index_bias)
61 struct translate *translate = nvc0->vertex->translate;
64 for (i = 0; i < nvc0->num_vtxbufs; ++i) {
66 const struct pipe_vertex_buffer *vb = &nvc0->vtxbuf[i];
71 map = nouveau_resource_map_offset(&nvc0->base,
74 if (index_bias && !unlikely(nvc0->vertex->instance_bufs & (1 << i)))
82 nvc0_push_map_idxbuf(struct push_context *ctx, struct nvc0_context *nvc0)
84 if (nvc0->idxbuf.buffer) {
85 struct nv04_resource *buf = nv04_resource(nvc0->idxbuf.buffer);
86 ctx->idxbuf = nouveau_resource_map_offset(&nvc0->base,
87 buf, nvc0->idxbuf.offset, NOUVEAU_BO_RD);
89 ctx->idxbuf = nvc0->idxbuf.user_buffer;
94 nvc0_push_map_edgeflag(struct push_context *ctx, struct nvc0_context *nvc0,
97 unsigned attr = nvc0->vertprog->vp.edgeflag;
98 struct pipe_vertex_element *ve = &nvc0->vertex->element[attr].pipe;
99 struct pipe_vertex_buffer *vb = &nvc0->vtxbuf[ve->vertex_buffer_index];
104 ctx->edgeflag.data = nouveau_resource_map_offset(&nvc0->base,
181 nvc0_push_setup_vertex_array(struct nvc0_context *nvc0, const unsigned count)
183 struct nouveau_pushbuf *push = nvc0->base.pushbuf;
186 const unsigned size = count * nvc0->vertex->size;
188 void *const dest = nouveau_scratch_get(&nvc0->base, size, &va, &bo);
197 BCTX_REFN_bo(nvc0->bufctx_3d, VTX_TMP, NOUVEAU_BO_GART | NOUVEAU_BO_RD,
430 nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
438 nvc0_push_context_init(nvc0, &ctx);
440 nvc0_vertex_configure_translate(nvc0, info->index_bias);
443 nvc0_push_map_edgeflag(&ctx, nvc0, info->index_bias);
449 nvc0_push_map_idxbuf(&ctx, nvc0);
450 index_size = nvc0->idxbuf.index_size;
457 if (nvc0->state.prim_restart) {
460 nvc0->state.prim_restart = info->primitive_restart;
463 struct pipe_context *pipe = &nvc0->base.pipe;
479 ctx.dest = nvc0_push_setup_vertex_array(nvc0, vert_count);
484 nvc0_push_upload_vertex_ids(&ctx, nvc0, info);
511 nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_VTX_TMP);
512 nouveau_scratch_done(&nvc0->base);
535 nouveau_resource_unmap(nv04_resource(nvc0->idxbuf.buffer));
536 for (i = 0; i < nvc0->num_vtxbufs; ++i)
537 nouveau_resource_unmap(nv04_resource(nvc0->vtxbuf[i].buffer));
566 struct nvc0_context *nvc0,
575 unsigned index_size = nvc0->idxbuf.index_size;
577 unsigned a = nvc0->vertex->num_elements;
581 data = (uint32_t *)nouveau_scratch_get(&nvc0->base,
584 BCTX_REFN_bo(nvc0->bufctx_3d, VTX_TMP, NOUVEAU_BO_GART | NOUVEAU_BO_RD,
592 switch (nvc0->idxbuf.index_size) {
626 if (unlikely(nvc0->state.instance_elts & 2)) {
627 nvc0->state.instance_elts &= ~2;
