Lines Matching full:surf
1255 struct r600_surface *surf,
1259 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
1260 unsigned level = surf->base.u.tex.level;
1270 r600_init_flushed_depth_texture(&rctx->context, surf->base.texture, NULL);
1278 surf->base.u.tex.first_layer;
1302 desc = util_format_description(surf->base.format);
1325 format = r600_translate_colorformat(surf->base.format);
1328 swap = r600_translate_colorswap(surf->base.format);
1346 surf->alphatest_bypass = ntype == V_0280A0_NUMBER_UINT || ntype == V_0280A0_NUMBER_SINT;
1372 surf->export_16bpc = true;
1386 surf->export_16bpc = true;
1391 surf->cb_color_base = offset >> 8;
1392 surf->cb_color_size = S_028060_PITCH_TILE_MAX(pitch) |
1394 surf->cb_color_fmask = surf->cb_color_base;
1395 surf->cb_color_cmask = surf->cb_color_base;
1396 surf->cb_color_mask = 0;
1398 pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_cmask,
1400 pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_fmask,
1404 surf->cb_color_cmask = rtex->cmask_offset >> 8;
1405 surf->cb_color_mask |= S_028100_CMASK_BLOCK_MAX(rtex->cmask_slice_tile_max);
1409 surf->cb_color_fmask = rtex->fmask_offset >> 8;
1410 surf->cb_color_mask |= S_028100_FMASK_TILE_MAX(slice);
1442 pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_cmask,
1453 pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_fmask,
1458 surf->cb_color_cmask = 0;
1459 surf->cb_color_fmask = 0;
1460 surf->cb_color_mask = S_028100_CMASK_BLOCK_MAX(cmask.slice_tile_max) |
1464 surf->cb_color_info = color_info;
1467 surf->cb_color_view = 0;
1469 surf->cb_color_view = S_028080_SLICE_START(surf->base.u.tex.first_layer) |
1470 S_028080_SLICE_MAX(surf->base.u.tex.last_layer);
1473 surf->color_initialized = true;
1477 struct r600_surface *surf)
1479 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
1482 level = surf->base.u.tex.level;
1501 format = r600_translate_dbformat(surf->base.format);
1504 surf->db_depth_info = S_028010_ARRAY_MODE(array_mode) | S_028010_FORMAT(format);
1505 surf->db_depth_base = offset >> 8;
1506 surf->db_depth_view = S_028004_SLICE_START(surf->base.u.tex.first_layer) |
1507 S_028004_SLICE_MAX(surf->base.u.tex.last_layer);
1508 surf->db_depth_size = S_028000_PITCH_TILE_MAX(pitch) | S_028000_SLICE_TILE_MAX(slice);
1509 surf->db_prefetch_limit = (rtex->surface.level[level].nblk_y / 8) - 1;
1511 surf->depth_initialized = true;
1585 struct r600_surface *surf;
1614 surf = (struct r600_surface*)state->cbufs[i];
1615 res = (struct r600_resource*)surf->base.texture;
1620 if (!surf->color_initialized || force_cmask_fmask) {
1621 r600_init_color_surface(rctx, surf, force_cmask_fmask);
1624 surf->color_initialized = false;
1628 if (!surf->export_16bpc) {
1633 surf->cb_color_base, res, RADEON_USAGE_READWRITE);
1635 surf->cb_color_info, res, RADEON_USAGE_READWRITE);
1637 surf->cb_color_size);
1639 surf->cb_color_view);
1641 surf->cb_color_fmask, surf->cb_buffer_fmask,
1644 surf->cb_color_cmask, surf->cb_buffer_cmask,
1647 surf->cb_color_mask);
1656 surf->cb_color_info, res, RADEON_USAGE_READWRITE);
1666 surf = (struct r600_surface*)state->cbufs[0];
1667 if (rctx->alphatest_state.bypass != surf->alphatest_bypass) {
1668 rctx->alphatest_state.bypass = surf->alphatest_bypass;
1675 surf = (struct r600_surface*)state->zsbuf;
1676 res = (struct r600_resource*)surf->base.texture;
1680 if (!surf->depth_initialized) {
1681 r600_init_depth_surface(rctx, surf);
1684 r600_pipe_state_add_reg_bo(rstate, R_02800C_DB_DEPTH_BASE, surf->db_depth_base,
1686 r600_pipe_state_add_reg(rstate, R_028000_DB_DEPTH_SIZE, surf->db_depth_size);
1687 r600_pipe_state_add_reg(rstate, R_028004_DB_DEPTH_VIEW, surf->db_depth_view);
1688 r600_pipe_state_add_reg_bo(rstate, R_028010_DB_DEPTH_INFO, surf->db_depth_info,
1690 r600_pipe_state_add_reg(rstate, R_028D34_DB_PREFETCH_LIMIT, surf->db_prefetch_limit);
