Lines Matching refs:And
60 // safeNestedForEachFunction. I push atomic conversions to a vector and handle
65 // and evaluated after the __amdil_image* functions are evaluated
89 // On 7XX and 8XX operations, we do not have 24 bit signed operations. So in
91 // and then expand.
95 // specified then the result of get_local_size is known at compile time and
104 // code. This checks for this scenario and fixes it if possible.
109 // doesn't occur and we need to know the value of kernel defined
229 // another pointer we need to take the conservative approach and place all
330 // call instruction to a vector and process
404 } else if (base->getOpcode() == Instruction::And) {
409 dbgs() << "Failed setup with no Shl or And instruction on base opcode!\n";
411 // If the base is neither a Shl or a And, we don't fit any of the patterns above.
421 // If we find an 'and' operation, then we don't need to
430 } else if (src->getOpcode() == Instruction::And && !mask) {
435 dbgs() << "Failed setup since both mask and shift are NULL!\n";
481 // We currently cannot support more than 4 elements in a intrinsic and we
691 if (inst->getOpcode() != Instruction::And) {
697 // We want to do some simple optimizations on Shift right/And patterns. The
699 // value smaller than 32 and C is a mask. If C is a constant value, then the
726 // We currently cannot support more than 4 elements in a intrinsic and we
745 // Lets make sure that the shift value and the and mask are constant integers.
761 "shift and an and are different!");
791 // This must be a mask value where all lower bits are set to 1 and then any
868 BinaryOperator::Create(Instruction::And, CI->getOperand(0),
873 rhs = BinaryOperator::Create(Instruction::And, rhs, CI->getOperand(2),
910 BinaryOperator::Create(Instruction::And, CI->getOperand(0),
917 BinaryOperator::Create(Instruction::And, CI->getOperand(1),
1000 // On 7XX and 8XX we do not have signed 24bit, so we need to
1134 // fail and return.
1139 // If we don't have an initializer or we have an initializer and
1147 // all uses of the load instruction with the samplerVal and
