Lines Matching refs:csc
98 static boolean radeon_init_cs_context(struct radeon_cs_context *csc,
101 csc->fd = ws->fd;
102 csc->nrelocs = 512;
103 csc->relocs_bo = (struct radeon_bo**)
104 CALLOC(1, csc->nrelocs * sizeof(struct radeon_bo*));
105 if (!csc->relocs_bo) {
109 csc->relocs = (struct drm_radeon_cs_reloc*)
110 CALLOC(1, csc->nrelocs * sizeof(struct drm_radeon_cs_reloc));
111 if (!csc->relocs) {
112 FREE(csc->relocs_bo);
116 csc->chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
117 csc->chunks[0].length_dw = 0;
118 csc->chunks[0].chunk_data = (uint64_t)(uintptr_t)csc->buf;
119 csc->chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
120 csc->chunks[1].length_dw = 0;
121 csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs;
122 csc->chunks[2].chunk_id = RADEON_CHUNK_ID_FLAGS;
123 csc->chunks[2].length_dw = 2;
124 csc->chunks[2].chunk_data = (uint64_t)(uintptr_t)&csc->flags;
126 csc->chunk_array[0] = (uint64_t)(uintptr_t)&csc->chunks[0];
127 csc->chunk_array[1] = (uint64_t)(uintptr_t)&csc->chunks[1];
128 csc->chunk_array[2] = (uint64_t)(uintptr_t)&csc->chunks[2];
130 csc->cs.chunks = (uint64_t)(uintptr_t)csc->chunk_array;
134 static void radeon_cs_context_cleanup(struct radeon_cs_context *csc)
138 for (i = 0; i < csc->crelocs; i++) {
139 p_atomic_dec(&csc->relocs_bo[i]->num_cs_references);
140 radeon_bo_reference(&csc->relocs_bo[i], NULL);
143 csc->crelocs = 0;
144 csc->validated_crelocs = 0;
145 csc->chunks[0].length_dw = 0;
146 csc->chunks[1].length_dw = 0;
147 csc->used_gart = 0;
148 csc->used_vram = 0;
149 memset(csc->is_handle_added, 0, sizeof(csc->is_handle_added));
152 static void radeon_destroy_cs_context(struct radeon_cs_context *csc)
154 radeon_cs_context_cleanup(csc);
155 FREE(csc->relocs_bo);
156 FREE(csc->relocs);
187 cs->csc = &cs->csc1;
189 cs->base.buf = cs->csc->buf;
210 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo)
214 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
216 if (csc->is_handle_added[hash]) {
217 i = csc->reloc_indices_hashlist[hash];
218 reloc = &csc->relocs[i];
224 for (i = csc->crelocs; i != 0;) {
226 reloc = &csc->relocs[i];
237 csc->reloc_indices_hashlist[hash] = i;
247 static unsigned radeon_add_reloc(struct radeon_cs_context *csc,
255 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1);
259 if (csc->is_handle_added[hash]) {
260 i = csc->reloc_indices_hashlist[hash];
261 reloc = &csc->relocs[i];
268 for (i = csc->crelocs; i != 0;) {
270 reloc = &csc->relocs[i];
274 csc->reloc_indices_hashlist[hash] = i;
282 if (csc->crelocs >= csc->nrelocs) {
284 csc->nrelocs += 10;
286 size = csc->nrelocs * sizeof(struct radeon_bo*);
287 csc->relocs_bo = (struct radeon_bo**)realloc(csc->relocs_bo, size);
289 size = csc->nrelocs * sizeof(struct drm_radeon_cs_reloc);
290 csc->relocs = (struct drm_radeon_cs_reloc*)realloc(csc->relocs, size);
292 csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs;
296 csc->relocs_bo[csc->crelocs] = NULL;
297 radeon_bo_reference(&csc->relocs_bo[csc->crelocs], bo);
299 reloc = &csc->relocs[csc->crelocs];
305 csc->is_handle_added[hash] = TRUE;
306 csc->reloc_indices_hashlist[hash] = csc->crelocs;
308 csc->chunks[1].length_dw += RELOC_DWORDS;
311 return csc->crelocs++;
323 unsigned index = radeon_add_reloc(cs->csc, bo, usage, domains, &added_domains);
326 cs->csc->used_gart += bo->base.size;
328 cs->csc->used_vram += bo->base.size;
337 cs->csc->used_gart < cs->ws->info.gart_size * 0.8 &&
338 cs->csc->used_vram < cs->ws->info.vram_size * 0.8;
341 cs->csc->validated_crelocs = cs->csc->crelocs;
348 for (i = cs->csc->validated_crelocs; i < cs->csc->crelocs; i++) {
349 p_atomic_dec(&cs->csc->relocs_bo[i]->num_cs_references);
350 radeon_bo_reference(&cs->csc->relocs_bo[i], NULL);
352 cs->csc->crelocs = cs->csc->validated_crelocs;
355 if (cs->csc->crelocs) {
358 radeon_cs_context_cleanup(cs->csc);
373 (cs->csc->used_gart + gtt) < cs->ws->info.gart_size * 0.7 &&
374 (cs->csc->used_vram + vram) < cs->ws->info.vram_size * 0.7;
385 unsigned index = radeon_get_reloc(cs->csc, bo);
396 static void radeon_drm_cs_emit_ioctl_oneshot(struct radeon_cs_context *csc)
400 if (drmCommandWriteRead(csc->fd, DRM_RADEON_CS,
401 &csc->cs, sizeof(struct drm_radeon_cs))) {
406 for (i = 0; i < csc->chunks[0].length_dw; i++) {
407 fprintf(stderr, "0x%08X\n", csc->buf[i]);
415 for (i = 0; i < csc->crelocs; i++)
416 p_atomic_dec(&csc->relocs_bo[i]->num_active_ioctls);
418 radeon_cs_context_cleanup(csc);
457 tmp = cs->csc;
458 cs->csc = cs->cst;
500 cs->base.buf = cs->csc->buf;
544 index = radeon_get_reloc(cs->csc, bo);
548 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain)
550 if ((usage & RADEON_USAGE_READ) && cs->csc->relocs[index].read_domains)
