Lines Matching refs:CPURegister
65 // Some CPURegister methods can return Register and FPRegister types, so we
71 struct CPURegister {
89 static CPURegister Create(int code, int size, RegisterType type) {
90 CPURegister r = {code, size, type};
106 bool Is(const CPURegister& other) const;
107 bool Aliases(const CPURegister& other) const;
120 bool IsSameSizeAndType(const CPURegister& other) const;
123 bool is(const CPURegister& other) const { return Is(other); }
132 struct Register : public CPURegister {
134 return Register(CPURegister::Create(code, size, CPURegister::kRegister));
140 reg_type = CPURegister::kNoRegister;
143 explicit Register(const CPURegister& r) {
198 struct FPRegister : public CPURegister {
209 CPURegister::Create(code, size, CPURegister::kFPRegister));
215 reg_type = CPURegister::kNoRegister;
218 explicit FPRegister(const CPURegister& r) {
256 STATIC_ASSERT(sizeof(CPURegister) == sizeof(Register));
257 STATIC_ASSERT(sizeof(CPURegister) == sizeof(FPRegister));
262 const CPURegister init_##register_class##_##name = {code, size, type}; \
278 INITIALIZE_REGISTER(Register, NoReg, 0, 0, CPURegister::kNoRegister);
279 INITIALIZE_REGISTER(FPRegister, NoFPReg, 0, 0, CPURegister::kNoRegister);
280 INITIALIZE_REGISTER(CPURegister, NoCPUReg, 0, 0, CPURegister::kNoRegister);
283 INITIALIZE_REGISTER(Register, no_reg, 0, 0, CPURegister::kNoRegister);
287 kWRegSizeInBits, CPURegister::kRegister); \
289 kXRegSizeInBits, CPURegister::kRegister);
294 CPURegister::kRegister);
296 CPURegister::kRegister);
300 kSRegSizeInBits, CPURegister::kFPRegister); \
302 kDRegSizeInBits, CPURegister::kFPRegister);
350 bool AreAliased(const CPURegister& reg1,
351 const CPURegister& reg2,
352 const CPURegister& reg3 = NoReg,
353 const CPURegister& reg4 = NoReg,
354 const CPURegister& reg5 = NoReg,
355 const CPURegister& reg6 = NoReg,
356 const CPURegister& reg7 = NoReg,
357 const CPURegister& reg8 = NoReg);
363 bool AreSameSizeAndType(const CPURegister& reg1,
364 const CPURegister& reg2,
365 const CPURegister& reg3 = NoCPUReg,
366 const CPURegister& reg4 = NoCPUReg,
367 const CPURegister& reg5 = NoCPUReg,
368 const CPURegister& reg6 = NoCPUReg,
369 const CPURegister& reg7 = NoCPUReg,
370 const CPURegister& reg8 = NoCPUReg);
382 explicit CPURegList(CPURegister reg1,
383 CPURegister reg2 = NoCPUReg,
384 CPURegister reg3 = NoCPUReg,
385 CPURegister reg4 = NoCPUReg)
392 CPURegList(CPURegister::RegisterType type, int size, RegList list)
397 CPURegList(CPURegister::RegisterType type, int size, int first_reg,
400 DCHECK(((type == CPURegister::kRegister) &&
402 ((type == CPURegister::kFPRegister) &&
410 CPURegister::RegisterType type() const {
436 void Combine(const CPURegister& other);
437 void Remove(const CPURegister& other1,
438 const CPURegister& other2 = NoCPUReg,
439 const CPURegister& other3 = NoCPUReg,
440 const CPURegister& other4 = NoCPUReg);
451 CPURegister PopLowestIndex();
452 CPURegister PopHighestIndex();
470 bool IncludesAliasOf(const CPURegister& other1,
471 const CPURegister& other2 = NoCPUReg,
472 const CPURegister& other3 = NoCPUReg,
473 const CPURegister& other4 = NoCPUReg) const {
507 CPURegister::RegisterType type_;
513 case CPURegister::kRegister:
515 case CPURegister::kFPRegister:
517 case CPURegister::kNoRegister:
1358 void ldr(const CPURegister& rt, const MemOperand& src);
1361 void str(const CPURegister& rt, const MemOperand& dst);
1385 void ldp(const CPURegister& rt, const CPURegister& rt2,
1389 void stp(const CPURegister& rt, const CPURegister& rt2,
1396 void ldr_pcrel(const CPURegister& rt, int imm19);
1399 void ldr(const CPURegister& rt, const Immediate& imm);
1701 static Instr Rd(CPURegister rd) {
1706 static Instr Rn(CPURegister rn) {
1711 static Instr Rm(CPURegister rm) {
1716 static Instr Ra(CPURegister ra) {
1721 static Instr Rt(CPURegister rt) {
1726 static Instr Rt2(CPURegister rt2) {
1731 static Instr Rs(CPURegister rs) {
1880 inline const Register& AppropriateZeroRegFor(const CPURegister& reg) const;
1882 void LoadStore(const CPURegister& rt,
1886 void LoadStorePair(const CPURegister& rt, const CPURegister& rt2,
1937 static inline LoadStoreOp LoadOpFor(const CPURegister& rt);
1938 static inline LoadStorePairOp LoadPairOpFor(const CPURegister& rt,
1939 const CPURegister& rt2);
1940 static inline LoadStoreOp StoreOpFor(const CPURegister& rt);
1941 static inline LoadStorePairOp StorePairOpFor(const CPURegister& rt,
1942 const CPURegister& rt2);
1943 static inline LoadLiteralOp LoadLiteralOpFor(const CPURegister& rt);
