Lines Matching full:case
58 case ADD_w_imm:
59 case ADD_x_imm: {
67 case ADDS_w_imm:
68 case ADDS_x_imm: {
76 case SUB_w_imm:
77 case SUB_x_imm: mnemonic = "sub"; break;
78 case SUBS_w_imm:
79 case SUBS_x_imm: {
102 case ADD_w_shift:
103 case ADD_x_shift: mnemonic = "add"; break;
104 case ADDS_w_shift:
105 case ADDS_x_shift: {
113 case SUB_w_shift:
114 case SUB_x_shift: {
122 case SUBS_w_shift:
123 case SUBS_x_shift: {
150 case ADD_w_ext:
151 case ADD_x_ext: mnemonic = "add"; break;
152 case ADDS_w_ext:
153 case ADDS_x_ext: {
161 case SUB_w_ext:
162 case SUB_x_ext: mnemonic = "sub"; break;
163 case SUBS_w_ext:
164 case SUBS_x_ext: {
185 case ADC_w:
186 case ADC_x: mnemonic = "adc"; break;
187 case ADCS_w:
188 case ADCS_x: mnemonic = "adcs"; break;
189 case SBC_w:
190 case SBC_x: {
198 case SBCS_w:
199 case SBCS_x: {
226 case AND_w_imm:
227 case AND_x_imm: mnemonic = "and"; break;
228 case ORR_w_imm:
229 case ORR_x_imm: {
239 case EOR_w_imm:
240 case EOR_x_imm: mnemonic = "eor"; break;
241 case ANDS_w_imm:
242 case ANDS_x_imm: {
292 case AND_w:
293 case AND_x: mnemonic = "and"; break;
294 case BIC_w:
295 case BIC_x: mnemonic = "bic"; break;
296 case EOR_w:
297 case EOR_x: mnemonic = "eor"; break;
298 case EON_w:
299 case EON_x: mnemonic = "eon"; break;
300 case BICS_w:
301 case BICS_x: mnemonic = "bics"; break;
302 case ANDS_w:
303 case ANDS_x: {
311 case ORR_w:
312 case ORR_x: {
320 case ORN_w:
321 case ORN_x: {
341 case CCMN_w:
342 case CCMN_x: mnemonic = "ccmn"; break;
343 case CCMP_w:
344 case CCMP_x: mnemonic = "ccmp"; break;
357 case CCMN_w_imm:
358 case CCMN_x_imm: mnemonic = "ccmn"; break;
359 case CCMP_w_imm:
360 case CCMP_x_imm: mnemonic = "ccmp"; break;
379 case CSEL_w:
380 case CSEL_x: mnemonic = "csel"; break;
381 case CSINC_w:
382 case CSINC_x: {
393 case CSINV_w:
394 case CSINV_x: {
405 case CSNEG_w:
406 case CSNEG_x: {
434 case SBFM_w:
435 case SBFM_x: {
458 case UBFM_w:
459 case UBFM_x: {
484 case BFM_w:
485 case BFM_x: {
503 case EXTR_w:
504 case EXTR_x: {
521 case ADR: Format(instr, "adr", "'Xd, 'AddrPCRelByte"); break;
530 case B_cond: Format(instr, "b.'CBrn", "'BImmCond"); break;
542 case BR: mnemonic = "br"; break;
543 case BLR: mnemonic = "blr"; break;
544 case RET: {
562 case B: mnemonic = "b"; break;
563 case BL: mnemonic = "bl"; break;
576 case A##_w: \
577 case A##_x: mnemonic = B; break;
584 case REV32_x: mnemonic = "rev32"; break;
597 case A##_w: \
598 case A##_x: mnemonic = B; break;
622 case MADD_w:
623 case MADD_x: {
632 case MSUB_w:
633 case MSUB_x: {
642 case SMADDL_x: {
650 case
658 case UMADDL_x: {
666 case UMSUBL_x: {
674 case SMULH_x: {
679 case UMULH_x: {
695 case CBZ_w:
696 case CBZ_x: mnemonic = "cbz"; break;
697 case CBNZ_w:
698 case CBNZ_x: mnemonic = "cbnz"; break;
714 case TBZ: mnemonic = "tbz"; break;
715 case TBNZ: mnemonic = "tbnz"; break;
730 case MOVN_w:
731 case MOVN_x: mnemonic = "movn"; break;
732 case MOVZ_w:
733 case MOVZ_x: mnemonic = "movz"; break;
734 case MOVK_w:
735 case MOVK_x: mnemonic = "movk"; form = "'Rd, 'IMoveLSL"; break;
767 case A##_pre: mnemonic = B; form = C ", ['Xns'ILS]!"; break;
781 case A##_post: mnemonic = B; form = C ", ['Xns]'ILS"; break;
795 case A##_unsigned: mnemonic = B; form = C ", ['Xns'ILU]"; break;
798 case PRFM_unsigned: mnemonic = "prfm"; form = "'PrefOp, ['Xn'ILU]";
810 case A##_reg: mnemonic = B; form = C ", ['Xns, 'Offsetreg]"; break;
813 case PRFM_reg: mnemonic = "prfm"; form = "'PrefOp, ['Xns, 'Offsetreg]";
827 case STURB_w: mnemonic = "sturb"; break;
828 case STURH_w: mnemonic = "sturh"; break;
829 case STUR_w: mnemonic = "stur"; break;
830 case STUR_x: mnemonic = "stur"; form = form_x; break;
831 case STUR_s: mnemonic = "stur"; form = form_s; break;
832 case STUR_d: mnemonic = "stur"; form = form_d; break;
833 case LDURB_w: mnemonic = "ldurb"; break;
834 case LDURH_w: mnemonic = "ldurh"; break;
835 case LDUR_w: mnemonic = "ldur"; break;
836 case LDUR_x: mnemonic = "ldur"; form = form_x; break;
837 case LDUR_s: mnemonic = "ldur"; form = form_s; break;
838 case LDUR_d: mnemonic = "ldur"; form = form_d; break;
839 case LDURSB_x: form = form_x; // Fall through.
840 case LDURSB_w: mnemonic = "ldursb"; break;
841 case LDURSH_x: form = form_x; // Fall through.
842 case LDURSH_w: mnemonic = "ldursh"; break;
843 case LDURSW_x: mnemonic = "ldursw"; form = form_x; break;
855 case LDR_w_lit: form = "'Wt, 'ILLiteral 'LValue"; break;
856 case LDR_x_lit: form = "'Xt, 'ILLiteral 'LValue"; break;
857 case LDR_s_lit: form = "'St, 'ILLiteral 'LValue"; break;
858 case LDR_d_lit: form = "'Dt, 'ILLiteral 'LValue"; break;
882 case A##_post: mnemonic = B; form = C ", ['Xns]'ILP" D; break;
896 case A##_pre: mnemonic = B; form = C ", ['Xns'ILP" D "]!"; break;
910 case A##_off: mnemonic = B; form = C ", ['Xns'ILP" D "]"; break;
925 case LDAXR_b: mnemonic = "ldaxrb"; break;
926 case STLR_b: mnemonic = "stlrb"; break;
927 case LDAR_b: mnemonic = "ldarb"; break;
928 case LDAXR_h: mnemonic = "ldaxrh"; break;
929 case STLR_h: mnemonic = "stlrh"; break;
930 case LDAR_h: mnemonic = "ldarh"; break;
931 case LDAXR_w: mnemonic = "ldaxr"; break;
932 case STLR_w: mnemonic = "stlr"; break;
933 case LDAR_w: mnemonic = "ldar"; break;
934 case LDAXR_x: mnemonic = "ldaxr"; form = form_x; break;
935 case STLR_x: mnemonic = "stlr"; form = form_x; break;
936 case LDAR_x: mnemonic = "ldar"; form = form_x; break;
937 case STLXR_h: mnemonic = "stlxrh"; form = form_stlx; break;
938 case STLXR_b: mnemonic = "stlxrb"; form = form_stlx; break;
939 case STLXR_w: mnemonic = "stlxr"; form = form_stlx; break;
940 case STLXR_x: mnemonic = "stlxr"; form = form_stlx_x; break;
952 case FCMP_s_zero:
953 case FCMP_d_zero: form = form_zero; // Fall through.
954 case FCMP_s:
955 case FCMP_d: mnemonic = "fcmp"; break;
967 case FCCMP_s:
968 case FCCMP_d: mnemonic = "fccmp"; break;
969 case FCCMPE_s:
970 case FCCMPE_d: mnemonic = "fccmpe"; break;
982 case FCSEL_s:
983 case FCSEL_d: mnemonic = "fcsel"; break;
996 case A##_s: \
997 case A##_d: mnemonic = B; break;
1010 case FCVT_ds: mnemonic = "fcvt"; form = "'Dd, 'Sn"; break;
1011 case FCVT_sd: mnemonic = "fcvt"; form = "'Sd, 'Dn"; break;
1024 case A##_s: \
1025 case A##_d: mnemonic = B; break;
1048 case A##_s: \
1049 case A##_d: mnemonic = B; break;
1066 case FMOV_s_imm: mnemonic = "fmov"; form = "'Sd, 'IFPSingle"; break;
1067 case FMOV_d_imm: mnemonic = "fmov"; form = "'Dd, 'IFPDouble"; break;
1081 case FMOV_ws:
1082 case FMOV_xd: mnemonic = "fmov"; form = form_rf; break;
1083 case FMOV_sw:
1084 case FMOV_dx: mnemonic = "fmov"; form = form_fr; break;
1085 case FCVTAS_ws:
1086 case FCVTAS_xs:
1087 case FCVTAS_wd:
1088 case FCVTAS_xd: mnemonic = "fcvtas"; form = form_rf; break;
1089 case FCVTAU_ws:
1090 case FCVTAU_xs:
1091 case FCVTAU_wd:
1092 case FCVTAU_xd: mnemonic = "fcvtau"; form = form_rf; break;
1093 case FCVTMS_ws:
1094 case FCVTMS_xs:
1095 case FCVTMS_wd:
1096 case FCVTMS_xd: mnemonic = "fcvtms"; form = form_rf; break;
1097 case FCVTMU_ws:
1098 case FCVTMU_xs:
1099 case FCVTMU_wd:
1100 case FCVTMU_xd: mnemonic = "fcvtmu"; form = form_rf; break;
1101 case FCVTNS_ws:
1102 case FCVTNS_xs:
1103 case FCVTNS_wd:
1104 case FCVTNS_xd: mnemonic = "fcvtns"; form = form_rf; break;
1105 case FCVTNU_ws:
1106 case FCVTNU_xs:
1107 case FCVTNU_wd:
1108 case FCVTNU_xd: mnemonic = "fcvtnu"; form = form_rf; break;
1109 case FCVTZU_xd:
1110 case FCVTZU_ws:
1111 case FCVTZU_wd:
1112 case FCVTZU_xs: mnemonic = "fcvtzu"; form = form_rf; break;
1113 case FCVTZS_xd:
1114 case FCVTZS_wd:
1115 case FCVTZS_xs:
1116 case FCVTZS_ws: mnemonic = "fcvtzs"; form = form_rf; break;
1117 case SCVTF_sw:
1118 case SCVTF_sx:
1119 case SCVTF_dw:
1120 case SCVTF_dx: mnemonic = "scvtf"; form = form_fr; break;
1121 case UCVTF_sw:
1122 case UCVTF_sx:
1123 case UCVTF_dw:
1124 case UCVTF_dx: mnemonic = "ucvtf"; form = form_fr; break;
1136 case FCVTZS_ws_fixed:
1137 case FCVTZS_xs_fixed:
1138 case FCVTZS_wd_fixed:
1139 case FCVTZS_xd_fixed: mnemonic = "fcvtzs"; break;
1140 case FCVTZU_ws_fixed:
1141 case FCVTZU_xs_fixed:
1142 case FCVTZU_wd_fixed:
1143 case FCVTZU_xd_fixed: mnemonic = "fcvtzu"; break;
1144 case SCVTF_sw_fixed:
1145 case SCVTF_sx_fixed:
1146 case SCVTF_dw_fixed:
1147 case SCVTF_dx_fixed: mnemonic = "scvtf"; form = form_fr; break;
1148 case UCVTF_sw_fixed:
1149 case UCVTF_sx_fixed:
1150 case UCVTF_dw_fixed:
1151 case UCVTF_dx_fixed: mnemonic = "ucvtf"; form = form_fr; break;
1166 case MRS: {
1169 case NZCV: form = "'Xt, nzcv"; break;
1170 case FPCR: form = "'Xt, fpcr"; break;
1175 case MSR: {
1178 case NZCV: form = "nzcv, 'Xt"; break;
1179 case FPCR: form = "fpcr, 'Xt"; break;
1188 case NOP: {
1196 case DMB: {
1201 case DSB: {
1206 case ISB: {
1223 case HLT: mnemonic = "hlt"; break;
1224 case BRK: mnemonic = "brk"; break;
1225 case SVC: mnemonic = "svc"; break;
1226 case HVC: mnemonic = "hvc"; break;
1227 case SMC: mnemonic = "smc"; break;
1228 case DCPS1: mnemonic = "dcps1"; form = "{'IDebug}"; break;
1229 case DCPS2: mnemonic = "dcps2"; form = "{'IDebug}"; break;
1230 case DCPS3: mnemonic = "dcps3"; form = "{'IDebug}"; break;
1284 case 'R': // Register. X or W, selected by sf bit.
1285 case 'F': // FP Register. S or D, selected by type field.
1286 case 'W':
1287 case 'X':
1288 case 'S':
1289 case 'D': return SubstituteRegisterField(instr, format);
1290 case 'I': return SubstituteImmediateField(instr, format);
1291 case 'L': return SubstituteLiteralField(instr, format);
1292 case 'H': return SubstituteShiftField(instr, format);
1293 case 'P': return SubstitutePrefetchField(instr, format);
1294 case 'C': return SubstituteConditionField(instr, format);
1295 case 'E': return SubstituteExtendField(instr, format);
1296 case 'A': return SubstitutePCRelAddressField(instr, format);
1297 case 'B': return SubstituteBranchTargetField(instr, format);
1298 case 'O': return SubstituteLSRegOffsetField(instr, format);
1299 case 'M': return SubstituteBarrierField(instr, format);
1313 case 'd': reg_num = instr->Rd(); break;
1314 case 'n': reg_num = instr->Rn(); break;
1315 case 'm': reg_num = instr->Rm(); break;
1316 case 'a': reg_num = instr->Ra(); break;
1317 case 't': {
1326 case 's':
1345 // Register type is specified. Make it lower case.
1381 case 'M': { // IMoveImm or IMoveLSL.
1395 case 'L': {
1397 case 'L': { // ILLiteral - Immediate Load Literal.
1402 case 'S': { // ILS - Immediate Load/Store.
1408 case 'P': { // ILPx - Immediate Load/Store Pair, x = access size.
1416 case 'U': { // ILU - Immediate Load/Store Unsigned.
1425 case 'C': { // ICondB - Immediate Conditional Branch.
1431 case 'A': { // IAddSub.
1437 case 'F': { // IFPSingle, IFPDouble or IFPFBits.
1447 case 'T': { // ITri - Immediate Triangular Encoded.
1451 case 'N': { // INzcv.
1459 case 'P': { // IP - Conditional compare.
1463 case 'B': { // Bitfields.
1466 case 'E': { // IExtract.
1470 case 'S': { // IS - Test and branch bit.
1475 case 'D': { // IDebug - HLT and BRK instructions.
1494 case 'r': { // IBr.
1498 case 's': { // IBs+1 or IBs-r+1.
1508 case 'Z': { // IBZ-r.
1529 case LDR_w_lit:
1530 case LDR_x_lit:
1531 case LDR_s_lit:
1532 case LDR_d_lit:
1548 case 'D': { // HDP.
1551 case 'L': { // HLo.
1575 case 'B': cond = instr->ConditionBranch(); break;
1576 case 'I': {
1615 case 'n': offset = instr->ImmUncondBranch(); break;
1617 case 'o': offset = instr->ImmCondBranch(); break;
1619 case 'm': offset = instr->ImmCmpBranch(); break;
1621 case 'e': offset = instr->ImmTestBranch(); break;