Lines Matching refs:left
105 *value_return = g.UseRegister(m.left().node());
129 *value_return = g.UseRegister(m.left().node());
222 if (m.left().node() == m.right().node()) {
230 InstructionOperand const input = g.UseRegister(m.left().node());
236 inputs[0] = g.UseRegister(m.left().node());
239 m.left().node(), &input_count,
246 inputs[input_count++] = g.UseRegister(m.left().node());
315 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
326 InstructionOperand left_operand = g.UseRegister(m.left().node());
583 void EmitBic(InstructionSelector* selector, Node* node, Node* left,
590 selector->Emit(opcode, g.DefineAsRegister(node), g.UseRegister(left),
595 g.DefineAsRegister(node), g.UseRegister(left),
600 void EmitUbfx(InstructionSelector* selector, Node* node, Node* left,
605 selector->Emit(kArmUbfx, g.DefineAsRegister(node), g.UseRegister(left),
615 if (m.left().IsWord32Xor() && CanCover(node, m.left().node())) {
616 Int32BinopMatcher mleft(m.left().node());
618 EmitBic(this, node, m.right().node(), mleft.left().node());
625 EmitBic(this, node, m.left().node(), mright.left().node());
634 // Try to merge SHR operations on the left hand input into this AND.
635 if (m.left().IsWord32Shr()) {
636 Int32BinopMatcher mshr(m.left().node());
645 g.DefineAsRegister(m.node()), g.UseRegister(mshr.left().node()),
657 EmitUbfx(this, node, mshr.left().node(), shift,
667 g.UseRegister(m.left().node()), g.TempImmediate(0));
673 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
684 EmitUbfx(this, node, m.left().node(), 0, width);
693 Emit(kArmBfc, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
715 if (TryMatchShift(this, &opcode, m.left().node(), &value_operand,
721 g.DefineAsRegister(node), g.UseRegister(m.left().node()));
786 if (IsSupported(ARMv7) && m.left().IsWord32And() &&
789 Int32BinopMatcher mleft(m.left().node());
796 return EmitUbfx(this, node, mleft.left().node(), lsb, width);
807 if (CanCover(m.node(), m.left().node()) && m.left().IsWord32Shl()) {
808 Int32BinopMatcher mleft(m.left().node());
814 g.UseRegister(mleft.left().node()), g.TempImmediate(0));
818 g.UseRegister(mleft.left().node()), g.TempImmediate(0));
822 g.UseRegister(mleft.left().node()), g.TempImmediate(sar - shl),
971 if (CanCover(node, m.left().node())) {
972 switch (m.left().opcode()) {
974 Int32BinopMatcher mleft(m.left().node());
976 g.UseRegister(mleft.left().node()),
982 Int32BinopMatcher mleft(m.left().node());
984 g.UseRegister(mleft.left().node()),
990 Int32BinopMatcher mleft(m.left().node());
994 g.UseRegister(mleft.left().node()), g.TempImmediate(0));
999 g.UseRegister(mleft.left().node()), g.TempImmediate(0));
1004 Int32BinopMatcher mleft(m.left().node());
1005 if (CanCover(mleft.node(), mleft.left().node()) &&
1006 mleft.left().IsWord32Shl()) {
1007 Int32BinopMatcher mleftleft(mleft.left().node());
1011 g.UseRegister(mleftleft.left().node()), g.TempImmediate(0));
1016 g.UseRegister(mleftleft.left().node()), g.TempImmediate(0));
1030 g.UseRegister(mright.left().node()),
1032 g.UseRegister(m.left().node()));
1038 g.UseRegister(mright.left().node()),
1040 g.UseRegister(m.left().node()));
1047 g.UseRegister(m.left().node()),
1048 g.UseRegister(mright.left().node()), g.TempImmediate(0));
1052 g.UseRegister(m.left().node()),
1053 g.UseRegister(mright.left().node()), g.TempImmediate(0));
1059 if (CanCover(mright.node(), mright.left().node()) &&
1060 mright.left().IsWord32Shl()) {
1061 Int32BinopMatcher mrightleft(mright.left().node());
1064 g.UseRegister(m.left().node()),
1065 g.UseRegister(mrightleft.left().node()), g.TempImmediate(0));
1069 g.UseRegister(m.left().node()),
1070 g.UseRegister(mrightleft.left().node()), g.TempImmediate(0));
1089 Emit(kArmMls, g.DefineAsRegister(node), g.UseRegister(mright.left().node()),
1090 g.UseRegister(mright.right().node()), g.UseRegister(m.left().node()));
1104 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1105 g.UseRegister(m.left().node()),
1111 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1112 g.UseRegister(m.left().node()),
1225 if (m.left().IsFloat32Mul() && CanCover(node, m.left().node())) {
1226 Float32BinopMatcher mleft(m.left().node());
1228 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
1234 Emit(kArmVmlaF32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
1235 g.UseRegister(mright.left().node()),
1246 if (m.left().IsFloat64Mul() && CanCover(node, m.left().node())) {
1247 Float64BinopMatcher mleft(m.left().node());
1249 g.UseRegister(m.right().node()), g.UseRegister(mleft.left().node()),
1255 Emit(kArmVmlaF64, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
1256 g.UseRegister(mright.left().node()),
1270 g.UseRegister(m.left().node()),
1271 g.UseRegister(mright.left().node()),
1284 g.UseRegister(m.left().node()),
1285 g.UseRegister(mright.left().node()),
1296 if (m.left().IsMinusZero()) {
1311 if (m.left().IsMinusZero()) {
1317 if (mright0.left().IsMinusZero()) {
1510 InstructionOperand left, InstructionOperand right,
1515 selector->Emit(opcode, g.NoOutput(), left, right,
1518 selector->EmitDeoptimize(opcode, g.NoOutput(), left, right,
1522 selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
1533 VisitCompare(selector, kArmVcmpF32, g.UseRegister(m.left().node()),
1535 } else if (m.left().Is(0.0f)) {
1538 g.UseImmediate(m.left().node()), cont);
1540 VisitCompare(selector, kArmVcmpF32, g.UseRegister(m.left().node()),
1552 VisitCompare(selector, kArmVcmpF64, g.UseRegister(m.left().node()),
1554 } else if (m.left().Is(0.0)) {
1557 g.UseImmediate(m.left().node()), cont);
1559 VisitCompare(selector, kArmVcmpF64, g.UseRegister(m.left().node()),
1577 inputs[0] = g.UseRegister(m.left().node());
1579 } else if (TryMatchImmediateOrShift(selector, &opcode, m.left().node(),
1586 inputs[input_count++] = g.UseRegister(m.left().node());
1628 value = m.left().node();
1784 return VisitWordCompareZero(this, m.node(), m.left().node(), &cont);
1886 Node* left = node->InputAt(0);
1888 if (left->opcode() == IrOpcode::kFloat64InsertHighWord32 &&
1889 CanCover(node, left)) {
1890 left = left->InputAt(1);
1892 g.UseRegister(left));
1895 Emit(kArmVmovLowF64U32, g.DefineSameAsFirst(node), g.UseRegister(left),
1902 Node* left = node->InputAt(0);
1904 if (left->opcode() == IrOpcode::kFloat64InsertLowWord32 &&
1905 CanCover(node, left)) {
1906 left = left->InputAt(1);
1907 Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(left),
1911 Emit(kArmVmovHighF64U32, g.DefineSameAsFirst(node), g.UseRegister(left),
