Lines Matching refs:Emit
72 selector->Emit(opcode, g.DefineAsRegister(node),
80 selector->Emit(opcode, g.DefineAsRegister(node),
89 selector->Emit(opcode, g.DefineAsRegister(node),
127 selector->Emit(opcode, output_count, outputs, input_count, inputs);
174 Emit(opcode | AddressingModeField::encode(kMode_MRI),
178 Emit(kMips64Dadd | AddressingModeField::encode(kMode_None), addr_reg,
180 // Emit desired load opcode, using temp addr_reg.
181 Emit(opcode | AddressingModeField::encode(kMode_MRI),
224 Emit(code, 0, nullptr, input_count, inputs, temp_count, temps);
255 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
259 Emit(kMips64Dadd | AddressingModeField::encode(kMode_None), addr_reg,
261 // Emit desired store opcode, using temp addr_reg.
262 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
294 Emit(kMips64Ext, g.DefineAsRegister(node),
309 Emit(kMips64Ins, g.DefineSameAsFirst(node),
344 Emit(kMips64Dext, g.DefineAsRegister(node),
360 Emit(kMips64Dins, g.DefineSameAsFirst(node),
387 Emit(kMips64Nor, g.DefineAsRegister(node),
396 Emit(kMips64Nor, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
411 Emit(kMips64Nor, g.DefineAsRegister(node),
420 Emit(kMips64Nor, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
447 Emit(kMips64Shl, g.DefineAsRegister(node),
473 Emit(kMips64Ext, g.DefineAsRegister(node),
496 Emit(kMips64Dshl, g.DefineSameAsFirst(node),
518 Emit(kMips64Dshl, g.DefineAsRegister(node),
544 Emit(kMips64Dext, g.DefineAsRegister(node),
578 Emit(kMips64Ctz, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
584 Emit(kMips64Dctz, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
590 Emit(kMips64Popcnt, g.DefineAsRegister(node),
597 Emit(kMips64Dpopcnt, g.DefineAsRegister(node),
622 Emit(kMips64Lsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
634 Emit(kMips64Lsa, g.DefineAsRegister(node),
654 Emit(kMips64Dlsa, g.DefineAsRegister(node),
667 Emit(kMips64Dlsa, g.DefineAsRegister(node),
694 Emit(kMips64Shl | AddressingModeField::encode(kMode_None),
700 Emit(kMips64Lsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
707 Emit(kMips64Shl | AddressingModeField::encode(kMode_None), temp,
710 Emit(kMips64Sub | AddressingModeField::encode(kMode_None),
723 Emit(kMips64DMulHigh, g.DefineSameAsFirst(node),
751 Emit(kMips64Dshl | AddressingModeField::encode(kMode_None),
758 Emit(kMips64Dlsa, g.DefineAsRegister(node),
765 Emit(kMips64Dshl | AddressingModeField::encode(kMode_None), temp,
768 Emit(kMips64Dsub | AddressingModeField::encode(kMode_None),
773 Emit(kMips64Dmul, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
789 Emit(kMips64Ddiv, g.DefineSameAsFirst(node),
796 Emit(kMips64Div, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
804 Emit(kMips64DivU, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
820 Emit(kMips64Dmod, g.DefineSameAsFirst(node),
827 Emit(kMips64Mod, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
835 Emit(kMips64ModU, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
843 Emit(kMips64Ddiv, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
851 Emit(kMips64DdivU, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
859 Emit(kMips64Dmod, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
867 Emit(kMips64DmodU, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
915 Emit(kMips64FloorWD, g.DefineAsRegister(node),
919 Emit(kMips64CeilWD, g.DefineAsRegister(node),
923 Emit(kMips64RoundWD, g.DefineAsRegister(node),
927 Emit(kMips64TruncWD, g.DefineAsRegister(node),
939 Emit(kMips64FloorWS, g.DefineAsRegister(node),
943 Emit(kMips64CeilWS, g.DefineAsRegister(node),
947 Emit(kMips64RoundWS, g.DefineAsRegister(node),
951 Emit(kMips64TruncWS, g.DefineAsRegister(node),
955 Emit(kMips64TruncWS, g.DefineAsRegister(node),
961 Emit(kMips64TruncWS, g.DefineAsRegister(node),
991 this->Emit(kMips64TruncLS, output_count, outputs, 1, inputs);
1007 Emit(kMips64TruncLD, output_count, outputs, 1, inputs);
1023 Emit(kMips64TruncUlS, output_count, outputs, 1, inputs);
1040 Emit(kMips64TruncUlD, output_count, outputs, 1, inputs);
1046 Emit(kMips64Shl, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
1053 Emit(kMips64Dext, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
1067 Emit(kMips64Dsar, g.DefineSameAsFirst(node),
1078 Emit(kMips64Ext, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
1090 Emit(kMips64CvtSW, g.DefineAsRegister(node),
1137 Emit(kMips64Float64InsertLowWord32, g.DefineAsRegister(node),
1175 Emit(kMips64Float64RoundUp, g.DefineAsRegister(node),
1210 Emit(kMips64ModD, g.DefineAsFixed(node, f0),
1219 Emit(kMips64Float32Max, g.DefineAsRegister(node),
1225 Emit(kMips64Float32Max, g.DefineSameAsFirst(node),
1234 Emit(kMips64Float64Max, g.DefineAsRegister(node),
1240 Emit(kMips64Float64Max, g.DefineSameAsFirst(node),
1249 Emit(kMips64Float32Min, g.DefineAsRegister(node),
1255 Emit(kMips64Float32Min, g.DefineSameAsFirst(node),
1264 Emit(kMips64Float64Min, g.DefineAsRegister(node),
1270 Emit(kMips64Float64Min, g.DefineSameAsFirst(node),
1346 Emit(opcode, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12),
1354 Emit(opcode, g.DefineAsFixed(node, f0), g.UseFixed(node->InputAt(0), f12))
1365 Emit(kArchPrepareCallCFunction |
1372 Emit(kMips64StoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()),
1379 Emit(kMips64StackClaim, g.NoOutput(),
1385 Emit(kMips64StoreToStackSlot, g.NoOutput(), g.UseRegister(input.node()),
1440 Emit(opcode | AddressingModeField::encode(kMode_MRI),
1490 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1505 selector->Emit(opcode, g.NoOutput(), left, right,
1512 selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
1629 selector->Emit(opcode, g.NoOutput(), value_operand, g.TempImmediate(0),
1635 selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
1754 // Continuation could not be combined with a compare, emit compare against 0.
1782 // Emit either ArchTableSwitch or ArchLookupSwitch.
1794 Emit(kMips64Sub, index_operand, value_operand,
1975 Emit(kMips64Float64InsertLowWord32, g.DefineSameAsFirst(node),
1984 Emit(kMips64Float64InsertHighWord32, g.DefineSameAsFirst(node),
2009 Emit(opcode | AddressingModeField::encode(kMode_MRI),
2013 Emit(kMips64Dadd | AddressingModeField::encode(kMode_None), addr_reg,
2015 // Emit desired load opcode, using temp addr_reg.
2016 Emit(opcode | AddressingModeField::encode(kMode_MRI),
2044 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
2048 Emit(kMips64Dadd | AddressingModeField::encode(kMode_None), addr_reg,
2050 // Emit desired store opcode, using temp addr_reg.
2051 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
