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70   void PrintRs(Instruction* instr);
71 void PrintRt(Instruction* instr);
72 void PrintRd(Instruction* instr);
73 void PrintFs(Instruction* instr);
74 void PrintFt(Instruction* instr);
75 void PrintFd(Instruction* instr);
76 void PrintSa(Instruction* instr);
77 void PrintLsaSa(Instruction* instr);
78 void PrintSd(Instruction* instr);
79 void PrintSs1(Instruction* instr);
80 void PrintSs2(Instruction* instr);
81 void PrintBc(Instruction* instr);
82 void PrintCc(Instruction* instr);
83 void PrintBp2(Instruction* instr);
84 void PrintFunction(Instruction* instr);
85 void PrintSecondaryField(Instruction* instr);
86 void PrintUImm16(Instruction* instr);
87 void PrintSImm16(Instruction* instr);
88 void PrintXImm16(Instruction* instr);
89 void PrintPCImm16(Instruction* instr, int delta_pc, int n_bits);
90 void PrintXImm18(Instruction* instr);
91 void PrintSImm18(Instruction* instr);
92 void PrintXImm19(Instruction* instr);
93 void PrintSImm19(Instruction* instr);
94 void PrintXImm21(Instruction* instr);
95 void PrintSImm21(Instruction* instr);
96 void PrintPCImm21(Instruction* instr, int delta_pc, int n_bits);
97 void PrintXImm26(Instruction* instr);
98 void PrintSImm26(Instruction* instr);
99 void PrintPCImm26(Instruction* instr, int delta_pc, int n_bits);
100 void PrintPCImm26(Instruction* instr);
101 void PrintCode(Instruction* instr); // For break and trap instructions.
102 void PrintFormat(Instruction* instr); // For floating format postfix.
104 void PrintInstructionName(Instruction* instr);
107 int FormatRegister(Instruction* instr, const char* option);
108 int FormatFPURegister(Instruction* instr, const char* option);
109 int FormatOption(Instruction* instr, const char* option);
110 void Format(Instruction* instr, const char* format);
111 void Unknown(Instruction* instr);
115 bool DecodeTypeRegisterRsType(Instruction* instr);
116 void DecodeTypeRegisterSRsType(Instruction* instr);
117 void DecodeTypeRegisterDRsType(Instruction* instr);
118 void DecodeTypeRegisterLRsType(Instruction* instr);
119 void DecodeTypeRegisterWRsType(Instruction* instr);
120 void DecodeTypeRegisterSPECIAL(Instruction* instr);
121 void DecodeTypeRegisterSPECIAL2(Instruction* instr);
122 void DecodeTypeRegisterSPECIAL3(Instruction* instr);
123 void DecodeTypeRegister(Instruction* instr);
124 void DecodeTypeImmediate(Instruction* instr);
125 void DecodeTypeJump(Instruction* instr);
163 void Decoder::PrintRs(Instruction* instr) {
164 int reg = instr->RsValue();
169 void Decoder::PrintRt(Instruction* instr) {
170 int reg = instr->RtValue();
175 void Decoder::PrintRd(Instruction* instr) {
176 int reg = instr->RdValue();
198 void Decoder::PrintFs(Instruction* instr) {
199 int freg = instr->RsValue();
204 void Decoder::PrintFt(Instruction* instr) {
205 int freg = instr->RtValue();
210 void Decoder::PrintFd(Instruction* instr) {
211 int freg = instr->RdValue();
217 void Decoder::PrintSa(Instruction* instr) {
218 int sa = instr->SaValue();
224 void Decoder::PrintLsaSa(Instruction* instr) {
225 int sa = instr->LsaSaValue() + 1;
231 void Decoder::PrintSd(Instruction* instr) {
232 int sd = instr->RdValue();
238 void Decoder::PrintSs1(Instruction* instr) {
239 int ss = instr->RdValue();
245 void Decoder::PrintSs2(Instruction* instr) {
246 int ss = instr->RdValue();
247 int pos = instr->SaValue();
254 void Decoder::PrintBc(Instruction* instr) {
255 int cc = instr->FBccValue();
261 void Decoder::PrintCc(Instruction* instr) {
262 int cc = instr->FCccValue();
267 void Decoder::PrintBp2(Instruction* instr) {
268 int bp2 = instr->Bp2Value();
274 void Decoder::PrintUImm16(Instruction* instr) {
275 int32_t imm = instr->Imm16Value();
281 void Decoder::PrintSImm16(Instruction* instr) {
282 int32_t imm = ((instr->Imm16Value()) << 16) >> 16;
288 void Decoder::PrintXImm16(Instruction* instr) {
289 int32_t imm = instr->Imm16Value();
297 void Decoder::PrintPCImm16(Instruction* instr, int delta_pc, int n_bits) {
298 int16_t offset = instr->Imm16Value();
301 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) +
307 void Decoder::PrintSImm18(Instruction* instr) {
309 ((instr->Imm18Value()) << (32 - kImm18Bits)) >> (32 - kImm18Bits);
315 void Decoder::PrintXImm18(Instruction* instr) {
316 int32_t imm = instr->Imm18Value();
322 void Decoder::PrintXImm19(Instruction* instr) {
323 int32_t imm = instr->Imm19Value();
329 void Decoder::PrintSImm19(Instruction* instr) {
330 int32_t imm19 = instr->Imm19Value();
339 void Decoder::PrintXImm21(Instruction* instr) {
340 uint32_t imm = instr->Imm21Value();
346 void Decoder::PrintSImm21(Instruction* instr) {
347 int32_t imm21 = instr->Imm21Value();
358 void Decoder::PrintPCImm21(Instruction* instr, int delta_pc, int n_bits) {
359 int32_t imm21 = instr->Imm21Value();
365 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) +
371 void Decoder::PrintXImm26(Instruction* instr) {
372 uint32_t target = static_cast<uint32_t>(instr->Imm26Value())
374 target = (reinterpret_cast<uint32_t>(instr) & ~0xfffffff) | target;
380 void Decoder::PrintSImm26(Instruction* instr) {
381 int32_t imm26 = instr->Imm26Value();
392 void Decoder::PrintPCImm26(Instruction* instr, int delta_pc, int n_bits) {
393 int32_t imm26 = instr->Imm26Value();
399 converter_.NameOfAddress(reinterpret_cast<byte*>(instr) +
407 void Decoder::PrintPCImm26(Instruction* instr) {
408 int32_t imm26 = instr->Imm26Value();
410 uint32_t pc = ((uint32_t)(instr + 1) & pc_mask) | (imm26 << 2);
418 void Decoder::PrintCode(Instruction* instr) {
419 if (instr->OpcodeFieldRaw() != SPECIAL)
421 switch (instr->FunctionFieldRaw()) {
423 int32_t code = instr->Bits(25, 6);
434 int32_t code = instr->Bits(15, 6);
445 void Decoder::PrintFormat(Instruction* instr) {
447 switch (instr->RsFieldRaw()) {
469 void Decoder::PrintInstructionName(Instruction* instr) {
475 int Decoder::FormatRegister(Instruction* instr, const char* format) {
478 int reg = instr->RsValue();
482 int reg = instr->RtValue();
486 int reg = instr->RdValue();
497 int Decoder::FormatFPURegister(Instruction* instr, const char* format) {
499 if ((CTC1 == instr->RsFieldRaw()) || (CFC1 == instr->RsFieldRaw())) {
501 int reg = instr->FsValue();
505 int reg = instr->FtValue();
509 int reg = instr->FdValue();
513 int reg = instr->FrValue();
519 int reg = instr->FsValue();
523 int reg = instr->FtValue();
527 int reg = instr->FdValue();
531 int reg = instr->FrValue();
546 int Decoder::FormatOption(Instruction* instr, const char* format) {
550 PrintCode(instr);
560 PrintSImm16(instr);
564 PrintSImm16(instr);
568 PrintXImm16(instr);
582 PrintPCImm16(instr, delta_pc, n_bits);
595 PrintSImm18(instr);
599 PrintXImm18(instr);
608 PrintSImm19(instr);
612 PrintXImm19(instr);
622 PrintSImm21(instr);
626 PrintXImm21(instr);
640 PrintPCImm21(instr, delta_pc, n_bits);
653 PrintSImm26(instr);
657 PrintXImm26(instr);
671 PrintPCImm26(instr, delta_pc, n_bits);
679 PrintPCImm26(instr);
687 return FormatRegister(instr, format);
690 return FormatFPURegister(instr, format);
697 PrintLsaSa(instr);
701 PrintSa(instr);
707 PrintSd(instr);
713 PrintSs1(instr);
717 PrintSs2(instr);
727 PrintBc(instr);
734 PrintBp2(instr);
743 PrintCc(instr);
747 PrintFormat(instr);
758 void Decoder::Format(Instruction* instr, const char* format) {
762 format += FormatOption(instr, format);
772 // For currently unimplemented decodings the disassembler calls Unknown(instr)
774 void Decoder::Unknown(Instruction* instr) {
775 Format(instr, "unknown");
779 bool Decoder::DecodeTypeRegisterRsType(Instruction* instr) {
780 switch (instr->FunctionFieldRaw()) {
782 Format(instr, "rint.'t 'fd, 'fs");
785 Format(instr, "min.'t 'fd, 'fs, 'ft");
788 Format(instr, "max.'t 'fd, 'fs, 'ft");
791 Format(instr, "mina.'t 'fd, 'fs, 'ft");
794 Format(instr, "maxa.'t 'fd, 'fs, 'ft");
797 Format(instr, "sel.'t 'fd, 'fs, 'ft");
800 Format(instr, "seleqz.'t 'fd, 'fs, 'ft");
803 Format(instr, "selnez.'t 'fd, 'fs, 'ft");
806 Format(instr, "movz.'t 'fd, 'fs, 'rt");
809 Format(instr, "movn.'t 'fd, 'fs, 'rt");
812 if (instr->Bit(16)) {
813 Format(instr, "movt.'t 'fd, 'fs, 'Cc");
815 Format(instr, "movf.'t 'fd, 'fs, 'Cc");
819 Format(instr, "add.'t 'fd, 'fs, 'ft");
822 Format(instr, "sub.'t 'fd, 'fs, 'ft");
825 Format(instr, "mul.'t 'fd, 'fs, 'ft");
828 Format(instr, "div.'t 'fd, 'fs, 'ft");
831 Format(instr, "abs.'t 'fd, 'fs");
834 Format(instr, "mov.'t 'fd, 'fs");
837 Format(instr, "neg.'t 'fd, 'fs");
840 Format(instr, "sqrt.'t 'fd, 'fs");
843 Format(instr, "recip.'t 'fd, 'fs");
846 Format(instr, "rsqrt.'t 'fd, 'fs");
849 Format(instr, "cvt.w.'t 'fd, 'fs");
852 Format(instr, "cvt.l.'t 'fd, 'fs");
855 Format(instr, "trunc.w.'t 'fd, 'fs");
858 Format(instr, "trunc.l.'t 'fd, 'fs");
861 Format(instr, "round.w.'t 'fd, 'fs");
864 Format(instr, "round.l.'t 'fd, 'fs");
867 Format(instr, "floor.w.'t 'fd, 'fs");
870 Format(instr, "floor.l.'t 'fd, 'fs");
873 Format(instr, "ceil.w.'t 'fd, 'fs");
876 Format(instr, "class.'t 'fd, 'fs");
879 Format(instr, "ceil.l.'t 'fd, 'fs");
882 Format(instr, "cvt.s.'t 'fd, 'fs");
885 Format(instr, "c.f.'t 'fs, 'ft, 'Cc");
888 Format(instr, "c.un.'t 'fs, 'ft, 'Cc");
891 Format(instr, "c.eq.'t 'fs, 'ft, 'Cc");
894 Format(instr, "c.ueq.'t 'fs, 'ft, 'Cc");
897 Format(instr, "c.olt.'t 'fs, 'ft, 'Cc");
900 Format(instr, "c.ult.'t 'fs, 'ft, 'Cc");
903 Format(instr, "c.ole.'t 'fs, 'ft, 'Cc");
906 Format(instr, "c.ule.'t 'fs, 'ft, 'Cc");
915 void Decoder::DecodeTypeRegisterSRsType(Instruction* instr) {
916 if (!DecodeTypeRegisterRsType(instr)) {
917 switch (instr->FunctionFieldRaw()) {
919 Format(instr, "cvt.d.'t 'fd, 'fs");
922 Format(instr, "unknown.cop1.'t");
929 void Decoder::DecodeTypeRegisterDRsType(Instruction* instr) {
930 if (!DecodeTypeRegisterRsType(instr)) {
931 Format(instr, "unknown.cop1.'t");
936 void Decoder::DecodeTypeRegisterLRsType(Instruction* instr) {
937 switch (instr->FunctionFieldRaw()) {
939 Format(instr, "cvt.d.l 'fd, 'fs");
942 Format(instr, "cvt.s.l 'fd, 'fs");
945 Format(instr, "cmp.af.d 'fd, 'fs, 'ft");
948 Format(instr, "cmp.un.d 'fd, 'fs, 'ft");
951 Format(instr, "cmp.eq.d 'fd, 'fs, 'ft");
954 Format(instr, "cmp.ueq.d 'fd, 'fs, 'ft");
957 Format(instr, "cmp.lt.d 'fd, 'fs, 'ft");
960 Format(instr, "cmp.ult.d 'fd, 'fs, 'ft");
963 Format(instr, "cmp.le.d 'fd, 'fs, 'ft");
966 Format(instr, "cmp.ule.d 'fd, 'fs, 'ft");
969 Format(instr, "cmp.or.d 'fd, 'fs, 'ft");
972 Format(instr, "cmp.une.d 'fd, 'fs, 'ft");
975 Format(instr, "cmp.ne.d 'fd, 'fs, 'ft");
983 void Decoder::DecodeTypeRegisterWRsType(Instruction* instr) {
984 switch (instr->FunctionValue()) {
986 Format(instr, "cvt.s.w 'fd, 'fs");
989 Format(instr, "cvt.d.w 'fd, 'fs");
992 Format(instr, "cmp.af.s 'fd, 'fs, 'ft");
995 Format(instr, "cmp.un.s 'fd, 'fs, 'ft");
998 Format(instr, "cmp.eq.s 'fd, 'fs, 'ft");
1001 Format(instr, "cmp.ueq.s 'fd, 'fs, 'ft");
1004 Format(instr, "cmp.lt.s 'fd, 'fs, 'ft");
1007 Format(instr, "cmp.ult.s 'fd, 'fs, 'ft");
1010 Format(instr, "cmp.le.s 'fd, 'fs, 'ft");
1013 Format(instr, "cmp.ule.s 'fd, 'fs, 'ft");
1016 Format(instr, "cmp.or.s 'fd, 'fs, 'ft");
1019 Format(instr, "cmp.une.s 'fd, 'fs, 'ft");
1022 Format(instr, "cmp.ne.s 'fd, 'fs, 'ft");
1030 void Decoder::DecodeTypeRegisterSPECIAL(Instruction* instr) {
1031 switch (instr->FunctionFieldRaw()) {
1033 Format(instr, "jr 'rs");
1036 Format(instr, "jalr 'rs, 'rd");
1039 if (0x0 == static_cast<int>(instr->InstructionBits()))
1040 Format(instr, "nop");
1042 Format(instr, "sll 'rd, 'rt, 'sa");
1045 if (instr->RsValue() == 0) {
1046 Format(instr, "srl 'rd, 'rt, 'sa");
1049 Format(instr, "rotr 'rd, 'rt, 'sa");
1051 Unknown(instr);
1056 Format(instr, "sra 'rd, 'rt, 'sa");
1059 Format(instr, "sllv 'rd, 'rt, 'rs");
1062 if (instr->SaValue() == 0) {
1063 Format(instr, "srlv 'rd, 'rt, 'rs");
1066 Format(instr, "rotrv 'rd, 'rt, 'rs");
1068 Unknown(instr);
1073 Format(instr, "srav 'rd, 'rt, 'rs");
1076 Format(instr, "lsa 'rd, 'rt, 'rs, 'sa2");
1079 if (instr->Bits(25, 16) == 0) {
1080 Format(instr, "mfhi 'rd");
1082 if ((instr->FunctionFieldRaw() == CLZ_R6) && (instr->FdValue() == 1)) {
1083 Format(instr, "clz 'rd, 'rs");
1084 } else if ((instr->FunctionFieldRaw() == CLO_R6) &&
1085 (instr->FdValue() == 1)) {
1086 Format(instr, "clo 'rd, 'rs");
1091 Format(instr, "mflo 'rd");
1095 Format(instr, "mult 'rs, 'rt");
1097 if (instr->SaValue() == MUL_OP) {
1098 Format(instr, "mul 'rd, 'rs, 'rt");
1100 Format(instr, "muh 'rd, 'rs, 'rt");
1106 Format(instr, "multu 'rs, 'rt");
1108 if (instr->SaValue() == MUL_OP) {
1109 Format(instr, "mulu 'rd, 'rs, 'rt");
1111 Format(instr
1117 Format(instr, "div 'rs, 'rt");
1119 if (instr->SaValue() == DIV_OP) {
1120 Format(instr, "div 'rd, 'rs, 'rt");
1122 Format(instr, "mod 'rd, 'rs, 'rt");
1128 Format(instr, "divu 'rs, 'rt");
1130 if (instr->SaValue() == DIV_OP) {
1131 Format(instr, "divu 'rd, 'rs, 'rt");
1133 Format(instr, "modu 'rd, 'rs, 'rt");
1138 Format(instr, "add 'rd, 'rs, 'rt");
1141 Format(instr, "addu 'rd, 'rs, 'rt");
1144 Format(instr, "sub 'rd, 'rs, 'rt");
1147 Format(instr, "subu 'rd, 'rs, 'rt");
1150 Format(instr, "and 'rd, 'rs, 'rt");
1153 if (0 == instr->RsValue()) {
1154 Format(instr, "mov 'rd, 'rt");
1155 } else if (0 == instr->RtValue()) {
1156 Format(instr, "mov 'rd, 'rs");
1158 Format(instr, "or 'rd, 'rs, 'rt");
1162 Format(instr, "xor 'rd, 'rs, 'rt");
1165 Format(instr, "nor 'rd, 'rs, 'rt");
1168 Format(instr, "slt 'rd, 'rs, 'rt");
1171 Format(instr, "sltu 'rd, 'rs, 'rt");
1174 Format(instr, "break, code: 'code");
1177 Format(instr, "tge 'rs, 'rt, code: 'code");
1180 Format(instr, "tgeu 'rs, 'rt, code: 'code");
1183 Format(instr, "tlt 'rs, 'rt, code: 'code");
1186 Format(instr, "tltu 'rs, 'rt, code: 'code");
1189 Format(instr, "teq 'rs, 'rt, code: 'code");
1192 Format(instr, "tne 'rs, 'rt, code: 'code");
1195 Format(instr, "sync");
1198 Format(instr, "movz 'rd, 'rs, 'rt");
1201 Format(instr, "movn 'rd, 'rs, 'rt");
1204 if (instr->Bit(16)) {
1205 Format(instr, "movt 'rd, 'rs, 'bc");
1207 Format(instr, "movf 'rd, 'rs, 'bc");
1211 Format(instr, "seleqz 'rd, 'rs, 'rt");
1214 Format(instr, "selnez 'rd, 'rs, 'rt");
1222 void Decoder::DecodeTypeRegisterSPECIAL2(Instruction* instr) {
1223 switch (instr->FunctionFieldRaw()) {
1225 Format(instr, "mul 'rd, 'rs, 'rt");
1229 Format(instr, "clz 'rd, 'rs");
1238 void Decoder::DecodeTypeRegisterSPECIAL3(Instruction* instr) {
1239 switch (instr->FunctionFieldRaw()) {
1242 Format(instr, "ins 'rt, 'rs, 'sa, 'ss2");
1244 Unknown(instr);
1250 Format(instr, "ext 'rt, 'rs, 'sa, 'ss1");
1252 Unknown(instr);
1257 int sa = instr->SaFieldRaw() >> kSaShift;
1261 Format(instr, "bitswap 'rd, 'rt");
1263 Unknown(instr);
1269 Format(instr, "seb 'rd, 'rt");
1271 Unknown(instr);
1277 Format(instr, "seh 'rd, 'rt");
1279 Unknown(instr);
1285 Format(instr, "wsbh 'rd, 'rt");
1287 Unknown(instr);
1296 Format(instr, "align 'rd, 'rs, 'rt, 'bp2");
1298 Unknown(instr);
1316 void Decoder::DecodeTypeRegister(Instruction* instr) {
1317 switch (instr->OpcodeFieldRaw()) {
1319 switch (instr->RsFieldRaw()) {
1324 Format(instr, "mfc1 'rt, 'fs");
1327 Format(instr, "mfhc1 'rt, 'fs");
1330 Format(instr, "mtc1 'rt, 'fs");
1334 Format(instr, "ctc1 'rt, 'fs");
1337 Format(instr, "cfc1 'rt, 'fs");
1340 Format(instr, "mthc1 'rt, 'fs");
1343 DecodeTypeRegisterSRsType(instr);
1346 DecodeTypeRegisterDRsType(instr);
1349 DecodeTypeRegisterLRsType(instr);
1352 DecodeTypeRegisterWRsType(instr);
1362 switch (instr->FunctionFieldRaw()) {
1364 Format(instr, "madd.d 'fd, 'fr, 'fs, 'ft");
1371 DecodeTypeRegisterSPECIAL(instr);
1374 DecodeTypeRegisterSPECIAL2(instr);
1377 DecodeTypeRegisterSPECIAL3(instr);
1385 void Decoder::DecodeTypeImmediate(Instruction* instr) {
1386 switch (instr->OpcodeFieldRaw()) {
1388 switch (instr->RsFieldRaw()) {
1390 if (instr->FBtrueValue()) {
1391 Format(instr, "bc1t 'bc, 'imm16u -> 'imm16p4s2");
1393 Format(instr, "bc1f 'bc, 'imm16u -> 'imm16p4s2");
1397 Format(instr, "bc1eqz 'ft, 'imm16u -> 'imm16p4s2");
1400 Format(instr, "bc1nez 'ft, 'imm16u -> 'imm16p4s2");
1409 switch (instr->RtFieldRaw()) {
1411 Format(instr, "bltz 'rs, 'imm16u -> 'imm16p4s2");
1414 Format(instr, "bltzal 'rs, 'imm16u -> 'imm16p4s2");
1417 Format(instr, "bgez 'rs, 'imm16u -> 'imm16p4s2");
1420 if (instr->RsValue() == 0)
1421 Format(instr, "bal 'imm16s -> 'imm16p4s2");
1423 Format(instr, "bgezal 'rs, 'imm16u -> 'imm16p4s2");
1427 Format(instr, "bgezall 'rs, 'imm16u -> 'imm16p4s2");
1435 Format(instr, "beq 'rs, 'rt, 'imm16u -> 'imm16p4s2");
1438 Format(instr, "bc 'imm26s -> 'imm26p4s2");
1441 Format(instr, "balc 'imm26s -> 'imm26p4s2");
1444 Format(instr, "bne 'rs, 'rt, 'imm16u -> 'imm16p4s2");
1447 if ((instr->RtValue() == 0) && (instr->RsValue() != 0)) {
1448 Format(instr, "blez 'rs, 'imm16u -> 'imm16p4s2");
1449 } else if ((instr->RtValue() != instr->RsValue()) &&
1450 (instr->RsValue() != 0) && (instr->RtValue() != 0)) {
1451 Format(instr, "bgeuc 'rs, 'rt, 'imm16u -> 'imm16p4s2");
1452 } else if ((instr->RtValue() == instr->RsValue()) &&
1453 (instr->RtValue() != 0)) {
1454 Format(instr, "bgezalc 'rs, 'imm16u -> 'imm16p4s2");
1455 } else if ((instr->RsValue() == 0) && (instr->RtValue() != 0)) {
1456 Format(instr, "blezalc 'rt, 'imm16u -> 'imm16p4s2");
1462 if ((instr->RtValue() == 0) && (instr->RsValue() != 0)) {
1463 Format(instr, "bgtz 'rs, 'imm16u -> 'imm16p4s2");
1464 } else if ((instr->RtValue() != instr->RsValue()) &&
1465 (instr->RsValue() != 0) && (instr->RtValue() != 0)) {
1466 Format(instr, "bltuc 'rs, 'rt, 'imm16u -> 'imm16p4s2");
1467 } else if ((instr->RtValue() == instr->RsValue()) &&
1468 (instr->RtValue() != 0)) {
1469 Format(instr, "bltzalc 'rt, 'imm16u -> 'imm16p4s2");
1470 } else if ((instr->RsValue() == 0) && (instr->RtValue() != 0)) {
1471 Format(instr, "bgtzalc 'rt, 'imm16u -> 'imm16p4s2");
1477 if ((instr->RtValue() == instr->RsValue()) && (instr->RtValue() != 0)) {
1478 Format(instr, "bgezc 'rt, 'imm16u -> 'imm16p4s2");
1479 } else if ((instr->RtValue() != instr->RsValue()) &&
1480 (instr->RsValue() != 0) && (instr->RtValue() != 0)) {
1481 Format(instr, "bgec 'rs, 'rt, 'imm16u -> 'imm16p4s2");
1482 } else if ((instr->RsValue() == 0) && (instr->RtValue() != 0)) {
1483 Format(instr, "blezc 'rt, 'imm16u -> 'imm16p4s2");
1489 if ((instr->RtValue() == instr->RsValue()) && (instr->RtValue() != 0)) {
1490 Format(instr, "bltzc 'rt, 'imm16u -> 'imm16p4s2");
1491 } else if ((instr->RtValue() != instr->RsValue()) &&
1492 (instr->RsValue() != 0) && (instr->RtValue() != 0)) {
1493 Format(instr, "bltc 'rs, 'rt, 'imm16u -> 'imm16p4s2");
1494 } else if ((instr->RsValue() == 0) && (instr->RtValue() != 0)) {
1495 Format(instr, "bgtzc 'rt, 'imm16u -> 'imm16p4s2");
1501 if (instr->RsValue() == JIC) {
1502 Format(instr, "jic 'rt, 'imm16s");
1504 Format(instr, "beqzc 'rs, 'imm21s -> 'imm21p4s2");
1508 if (instr->RsValue() == JIALC) {
1509 Format(instr, "jialc 'rt, 'imm16s");
1511 Format(instr, "bnezc 'rs, 'imm21s -> 'imm21p4s2");
1517 Format(instr, "addi 'rt, 'rs, 'imm16s");
1519 int rs_reg = instr->RsValue();
1520 int rt_reg = instr->RtValue();
1523 Format(instr, "bovc 'rs, 'rt, 'imm16s -> 'imm16p4s2");
1527 Format(instr, "beqzalc 'rt, 'imm16s -> 'imm16p4s2");
1529 Format(instr, "beqc 'rs, 'rt, 'imm16s -> 'imm16p4s2");
1536 int rs_reg = instr->RsValue();
1537 int rt_reg = instr->RtValue();
1540 Format(instr, "bnvc 'rs, 'rt, 'imm16s -> 'imm16p4s2");
1544 Format(instr, "bnezalc 'rt, 'imm16s -> 'imm16p4s2");
1546 Format(instr, "bnec 'rs, 'rt, 'imm16s -> 'imm16p4s2");
1552 Format(instr, "addiu 'rt, 'rs, 'imm16s");
1555 Format(instr, "slti 'rt, 'rs, 'imm16s");
1558 Format(instr, "sltiu 'rt, 'rs, 'imm16u");
1561 Format(instr, "andi 'rt, 'rs, 'imm16x");
1564 Format(instr, "ori 'rt, 'rs, 'imm16x");
1567 Format(instr, "xori 'rt, 'rs, 'imm16x");
1571 Format(instr, "lui 'rt, 'imm16x");
1573 if (instr->RsValue() != 0) {
1574 Format(instr, "aui 'rt, 'rs, 'imm16x");
1576 Format(instr, "lui 'rt, 'imm16x");
1582 Format(instr, "lb 'rt, 'imm16s('rs)");
1585 Format(instr, "lh 'rt, 'imm16s('rs)");
1588 Format(instr, "lwl 'rt, 'imm16s('rs)");
1591 Format(instr, "lw 'rt, 'imm16s('rs)");
1594 Format(instr, "lbu 'rt, 'imm16s('rs)");
1597 Format(instr, "lhu 'rt, 'imm16s('rs)");
1600 Format(instr, "lwr 'rt, 'imm16s('rs)");
1603 Format(instr, "pref 'rt, 'imm16s('rs)");
1606 Format(instr, "sb 'rt, 'imm16s('rs)");
1609 Format(instr, "sh 'rt, 'imm16s('rs)");
1612 Format(instr, "swl 'rt, 'imm16s('rs)");
1615 Format(instr, "sw 'rt, 'imm16s('rs)");
1618 Format(instr, "swr 'rt, 'imm16s('rs)");
1621 Format(instr, "lwc1 'ft, 'imm16s('rs)");
1624 Format(instr, "ldc1 'ft, 'imm16s('rs)");
1627 Format(instr, "swc1 'ft, 'imm16s('rs)");
1630 Format(instr, "sdc1 'ft, 'imm16s('rs)");
1633 int32_t imm21 = instr->Imm21Value();
1638 Format(instr, "aluipc 'rs, 'imm16s");
1641 Format(instr, "auipc 'rs, 'imm16s");
1648 Format(instr, "lwpc 'rs, 'imm19s");
1651 Format(instr, "addiupc 'rs, 'imm19s");
1662 printf("a 0x%x \n", instr->OpcodeFieldRaw());
1669 void Decoder::DecodeTypeJump(Instruction* instr) {
1670 switch (instr->OpcodeFieldRaw()) {
1672 Format(instr, "j 'imm26x -> 'imm26j");
1675 Format(instr, "jal 'imm26x -> 'imm26j");
1685 Instruction* instr = Instruction::At(instr_ptr);
1689 instr->InstructionBits());
1690 switch (instr->InstructionType(Instruction::EXTRA)) {
1692 DecodeTypeRegister(instr);
1696 DecodeTypeImmediate(instr);
1700 DecodeTypeJump(instr);
1704 Format(instr, "UNSUPPORTED");