Lines Matching refs:And
2 // Redistribution and use in source and binary forms, with or without
7 // notice, this list of conditions and the following disclaimer.
9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50 // Tests are functions which accept no parameters and have no return values.
73 // Once the test has been run all integer and floating point registers as well
137 // Reset the assembler and simulator, so that instructions can be generated,
140 // must be called before any callee-saved register is modified, and before an
257 // Add immediate to the csp, and move the result to a normal register.
261 // Add extended to the csp, and move the result to a normal register.
266 // Create an csp using a logical instruction, and move to normal register.
274 // Write csp, and read back wcsp.
363 // is a no-op for X registers, and a truncation for W registers.
697 __ And(x2, x0, Operand(x1));
698 __ And(w3, w0, Operand(w1, LSL, 4));
699 __ And(x4, x0, Operand(x1, LSL, 4));
700 __ And(x5, x0, Operand(x1, LSR, 1));
701 __ And(w6, w0, Operand(w1, ASR, 20));
702 __ And(x7, x0, Operand(x1, ASR, 20));
703 __ And(w8, w0, Operand(w1, ROR, 28));
704 __ And(x9, x0, Operand(x1, ROR, 28));
705 __ And(w10, w0, Operand(0xff00));
706 __ And(x11, x0, Operand(0xff));
733 __ And(w6, w0, Operand(w1, UXTB));
734 __ And(x7, x0, Operand(x1, UXTH, 1));
735 __ And(w8, w0, Operand(w1, UXTW, 2));
736 __ And(x9, x0, Operand(x1, UXTX, 3));
737 __ And(w10, w0, Operand(w1, SXTB));
738 __ And(x11, x0, Operand(x1, SXTH, 1));
739 __ And(x12, x0, Operand(x1, SXTW, 2));
740 __ And(x13, x0, Operand(x1, SXTX, 3));
1677 __ Eor(x5, x2, Operand(x3)); // Ensure that x2,x3 and x4 are identical.
2184 // that target out-of-range labels and are part of multiple instructions
2209 // Branches at the start of the chain for situations (2) and (3).
2227 // Branches at the end of the chain for situations (1) and (2).
2279 // a branch from the link chain of a label and the two links on each side of
3367 // These loads should be after the pool (and will require a new one).
5490 // Signalling NaNs are propagated, and made quiet.
5573 // Signalling NaNs are propagated, and made quiet.
6749 // through a list. The list is then negated and checked again (since the sign
7687 // Test that scvtf and ucvtf can convert the 64-bit input into the expected
7788 // results should not depened on the rounding mode, and ucvtf and scvtf should
7810 // and the results should not depend on the rounding mode.
7829 // Check rounding of negative int64_t values (and large uint64_t values).
7945 // results should not depened on the rounding mode, and ucvtf and scvtf should
7967 // and the results should not depend on the rounding mode.
7985 // Check rounding of negative int64_t values (and large uint64_t values).
8020 // Set the Z and C flags.
8028 // Set the Z, C and V flags.
8070 __ Cmp(w0, w0); // Set Z and C.
8071 __ Msr(NZCV, x10); // Set N and V.
8079 __ Cmn(w1, w1); // Set N and V.
8080 __ Msr(NZCV, x10); // Set Z and C.
8098 __ And(x9, x9, fpcr_core);
8274 // No code generation takes place in this test, so no need to setup and
8597 // Push or Pop using the Push and Pop methods, with blocks of up to four
8601 // Use Push<Size>RegList and Pop<Size>RegList to transfer the registers.
8617 // Different push and pop methods can be specified independently to test for
8802 // Different push and pop methods can be specified independently to test for
8830 // * It is never a floating-point NaN, and will therefore always compare
8978 // Push and pop data using an overlapping combination of Push/Pop and
8983 // Registers x8 and x9 are used by the macro assembler for debug code (for
9083 // Push and pop data using overlapping X- and W-sized quantities.
9099 // between W and X registers, so we need reg_count*1.5 W-sized slots.
9158 // alternating between x and w registers, and pushing i%4+1 copies of each,
9161 // alternating between x and w registers, but only popping one at a time.
9163 // This pattern provides a wide variety of alignment effects and overlaps.
9170 // In order to test various arguments to PushMultipleTimes, and to try to
9171 // exercise different alignment and overlap effects, we push each
9219 // and
9982 // The type and size mechanisms are already covered, so here we just test
10001 // Empty lists can have type and size properties. Check that we can create
10002 // them, and that they are empty.
10040 // temporary stack pointer later, and initializing it in this way allows the
10054 // Test the maximum number of arguments, and sign extension.
10119 // We cannot easily test the output of the Printf sequences, and because
10122 // that, and here we just test that we didn't clobber any registers.
10156 // Test the maximum number of arguments, and sign extension.
10358 // Execute a number of instructions which all use ProcessNaN, and check that
10434 // Execute a number of instructions which all use ProcessNaN, and check that
10500 // Execute a number of instructions which all use ProcessNaNs, and check that
10553 // Signalling NaNs are propagated, and made quiet.
10572 // Execute a number of instructions which all use ProcessNaNs, and check that
10625 // Signalling NaNs are propagated, and made quiet.
10651 // Execute a number of instructions which all use ProcessNaNs, and check that
10779 // Execute a number of instructions which all use ProcessNaNs, and check that
