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Lines Matching defs:gV

7950 /* Handle BT/BTS/BTR/BTC Gv, Ev.  Apparently b-size is not
15319 IRTemp gV = newTemp(Ity_V128);
15336 assign( gV, getXMMReg(rG) );
15337 putXMMReg( rG, mkexpr( math_HADDPS_128 ( gV, eV, isAdd ) ) );
15344 IRTemp gV = newTemp(Ity_V128);
15361 assign( gV, getXMMReg(rG) );
15362 putXMMReg( rG, mkexpr( math_HADDPD_128 ( gV, eV, isAdd ) ) );
15371 IRTemp gV = newTemp(Ity_V128);
15386 assign( gV, getXMMReg(rG) );
15387 putXMMReg( rG, mkexpr( math_ADDSUBPD_128 ( gV, eV ) ) );
15393 IRTemp gV = newTemp(Ity_V128);
15410 assign( gV, getXMMReg(rG) );
15411 putXMMReg( rG, mkexpr( math_ADDSUBPS_128 ( gV, eV ) ) );
19830 case 0x00: /* ADD Gb,Eb */ case 0x01: /* ADD Gv,Ev */
19831 case 0x08: /* OR Gb,Eb */ case 0x09: /* OR Gv,Ev */
19832 case 0x10: /* ADC Gb,Eb */ case 0x11: /* ADC Gv,Ev */
19833 case 0x18: /* SBB Gb,Eb */ case 0x19: /* SBB Gv,Ev */
19834 case 0x20: /* AND Gb,Eb */ case 0x21: /* AND Gv,Ev */
19835 case 0x28: /* SUB Gb,Eb */ case 0x29: /* SUB Gv,Ev */
19836 case 0x30: /* XOR Gb,Eb */ case 0x31: /* XOR Gv,Ev */
19857 case 0x01: /* ADD Gv,Ev */
19866 case 0x03: /* ADD Ev,Gv */
19884 case 0x09: /* OR Gv,Ev */
19893 case 0x0B: /* OR Ev,Gv */
19911 case 0x11: /* ADC Gv,Ev */
19920 case 0x13: /* ADC Ev,Gv */
19938 case 0x19: /* SBB Gv,Ev */
19947 case 0x1B: /* SBB Ev,Gv */
19965 case 0x21: /* AND Gv,Ev */
19974 case 0x23: /* AND Ev,Gv */
19992 case 0x29: /* SUB Gv,Ev */
20001 case 0x2B: /* SUB Ev,Gv */
20019 case 0x31: /* XOR Gv,Ev */
20028 case 0x33: /* XOR Ev,Gv */
20046 case 0x39: /* CMP Gv,Ev */
20055 case 0x3B: /* CMP Ev,Gv */
20152 case 0x69: /* IMUL Iv, Ev, Gv */
20177 case 0x6B: /* IMUL Ib, Ev, Gv */
20305 case 0x85: /* TEST Ev,Gv */
20316 case 0x87: /* XCHG Gv,Ev */
20363 case 0x89: { /* MOV Gv,Ev */
20376 case 0x8B: /* MOV Ev,Gv */
20386 case 0x8D: /* LEA M,Gv */
21980 case 0xA3: { /* BT Gv,Ev */
21989 case 0xA4: /* SHLDv imm8,Gv,Ev */
21999 case 0xA5: /* SHLDv %cl,Gv,Ev */
22007 case 0xAB: { /* BTS Gv,Ev */
22016 case 0xAC: /* SHRDv imm8,Gv,Ev */
22026 case 0xAD: /* SHRDv %cl,Gv,Ev */
22034 case 0xAF: /* IMUL Ev, Gv */
22047 case 0xB1: { /* CMPXCHG Gv,Ev (allowed in 16,32,64 bit) */
22056 case 0xB3: { /* BTR Gv,Ev */
22065 case 0xB6: /* MOVZXb Eb,Gv */
22072 case 0xB7: /* MOVZXw Ew,Gv */
22092 case 0xBB: { /* BTC Gv,Ev */
22101 case 0xBC: /* BSF Gv,Ev */
22114 case 0xBD: /* BSR Gv,Ev */
22127 case 0xBE: /* MOVSXb Eb,Gv */
22134 case 0xBF: /* MOVSXw Ew,Gv */
22149 case 0xC1: { /* XADD Gv,Ev */