Lines Matching refs:opc2
3481 UInt opc2 = ifieldOPClo9(theInstr);
3569 switch (opc2) {
4086 vex_printf("dis_int_arith(ppc)(opc2)\n");
4119 UInt opc2 = ifieldOPClo10(theInstr);
4172 switch (opc2) {
4212 vex_printf("dis_int_cmp(ppc)(opc2)\n");
4237 UInt opc2 = ifieldOPClo10(theInstr);
4295 switch (opc2) {
4586 vex_printf("dis_int_logic(ppc)(opc2)\n");
4614 UInt opc2 = ifieldOPClo10(theInstr);
4647 switch (opc2) {
4723 vex_printf("dis_int_parity(ppc)(opc2)\n");
4747 UChar opc2 = toUChar( IFIELD( theInstr, 2, 3 ) );
4879 switch (opc2) {
4963 vex_printf("dis_int_rot(ppc)(opc2)\n");
4994 UInt opc2 = ifieldOPClo10(theInstr);
5098 switch (opc2) {
5202 vex_printf("dis_int_load(ppc)(opc2)\n");
5233 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
5292 UInt opc2 = ifieldOPClo10(theInstr);
5370 switch (opc2) {
5434 vex_printf("dis_int_store(ppc)(opc2)\n");
5492 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
5662 UInt opc2 = ifieldOPClo10(theInstr);
5676 switch (opc2) {
5743 vex_printf("dis_int_ldst_str(ppc)(opc2)\n");
5832 UInt opc2 = ifieldOPClo10(theInstr);
5941 switch (opc2) {
6016 vex_printf("dis_int_branch(ppc)(opc2)\n");
6043 UInt opc2 = ifieldOPClo10(theInstr);
6055 if (opc2 == 0) { // mcrf (Move Cond Reg Field, PPC32 p464)
6071 switch (opc2) {
6112 vex_printf("dis_cond_logic(ppc)(opc2)\n");
6273 UInt opc2 = ifieldOPClo10(theInstr);
6284 switch (opc2) {
6377 UInt opc2 = ifieldOPClo10(theInstr);
6388 if (opc2 != 0x096) {
6389 vex_printf("dis_memsync(ppc)(0x13,opc2)\n");
6402 switch (opc2) {
6758 vex_printf("dis_memsync(ppc)(opc2)\n");
6783 UInt opc2 = ifieldOPClo10(theInstr);
6802 switch (opc2) {
6988 vex_printf("dis_int_shift(ppc)(opc2)\n");
7049 UInt opc2 = ifieldOPClo10(theInstr);
7064 switch (opc2) {
7129 vex_printf("dis_int_ldst_rev(ppc)(opc2)\n");
7158 UInt opc2 = ifieldOPClo10(theInstr);
7178 switch (opc2) {
7559 vex_printf("dis_proc_ctl(ppc)(opc2)\n");
7578 UInt opc2 = ifieldOPClo10(theInstr);
7588 if (opc1 == 0x1F && ((opc2 == 0x116) || (opc2 == 0xF6))) {
7592 if (opc1 == 0x1F && opc2 == 0x116 && b21to25 == 0x11)
7595 if (opc1 == 0x1F && opc2 == 0x3F6) { // dcbz
7616 switch (opc2) {
7712 vex_printf("dis_cache_manage(ppc)(opc2)\n");
7876 UInt opc2 = ifieldOPClo10(theInstr);
7934 switch(opc2) {
7990 vex_printf("dis_fp_load(ppc)(opc2)\n");
8014 UInt opc2 = ifieldOPClo10(theInstr);
8075 switch(opc2) {
8118 vex_printf("dis_fp_store(ppc)(opc2)\n");
8143 UChar opc2 = ifieldOPClo5(theInstr);
8169 switch (opc2) {
8242 vex_printf("dis_fp_arith(ppc)(3B: opc2)\n");
8248 switch (opc2) {
8343 vex_printf("dis_fp_arith(ppc)(3F: opc2)\n");
8381 UChar opc2 = ifieldOPClo5(theInstr);
8425 switch (opc2) {
8443 if (opc2 == 0x1E) {
8463 vex_printf("dis_fp_multadd(ppc)(3B: opc2)\n");
8469 switch (opc2) {
8487 if (opc2 == 0x1E) {
8507 vex_printf("dis_fp_multadd(ppc)(3F: opc2)\n");
8859 UInt opc2 = ifieldOPClo10(theInstr);
8868 switch (opc2) {
8910 vex_printf("dis_fp_tests(ppc)(opc2)\n");
8928 UInt opc2 = ifieldOPClo10(theInstr);
9000 switch (opc2) {
9008 vex_printf("dis_fp_cmp(ppc)(opc2)\n");
9026 UInt opc2 = ifieldOPClo10(theInstr);
9056 switch (opc2) {
9073 switch (opc2) {
9100 DIP("fctiwu%s%s fr%u,fr%u\n", opc2 == 0x08F ? "z" : "",
9104 opc2 == 0x08F ? mkU32( Irrm_ZERO ) : rm,
9133 DIP("fctidu%s%s fr%u,fr%u\n", opc2 == 0x3AE ? "" : "z",
9136 binop(Iop_F64toI64U, opc2 == 0x3AE ? rm : mkU32(Irrm_ZERO), mkexpr(frB)) );
9156 switch(opc2) {
9210 vex_printf("dis_fp_round(ppc)(opc2)\n");
9242 UInt opc2 = ifieldOPClo10(theInstr);
9258 switch(opc2) {
9267 vex_printf("dis_fp_pair(ppc) : X-form wrong opc2\n");
9317 UInt opc2 = ifieldOPClo10(theInstr);
9329 switch (opc2) {
9357 vex_printf("dis_fp_merge(ppc)(opc2)\n");
9375 UInt opc2 = ifieldOPClo10(theInstr);
9385 if (opc1 != 0x3F || (frA_addr != 0 && opc2 != 0x008)) {
9392 switch (opc2) {
9447 vex_printf("dis_fp_move(ppc)(opc2)\n");
9473 UInt opc2 = ifieldOPClo10(theInstr);
9481 switch (opc2) {
9635 vex_printf("dis_fp_scr(ppc)(opc2)\n");
10290 UInt opc2 = ifieldOPClo10( theInstr );
10312 switch (opc2) {
10348 UInt opc2 = ifieldOPClo10( theInstr );
10370 switch (opc2) {
10405 UInt opc2 = ifieldOPClo9( theInstr );
10417 switch (opc2) {
10442 UInt opc2 = ifieldOPClo9( theInstr );
10454 switch (opc2) {
10479 UInt opc2 = ifieldOPClo10( theInstr );
10488 switch (opc2) {
10545 UInt opc2 = ifieldOPClo10( theInstr );
10556 switch (opc2) {
10616 UInt opc2 = ifieldOPClo8( theInstr );
10619 switch (opc2) {
10641 vex_printf("dis_dfp_round(ppc)(opc2)\n");
10662 UInt opc2 = ifieldOPClo8( theInstr );
10664 switch (opc2) {
10682 vex_printf("dis_dfp_roundq(ppc)(opc2)\n");
10695 UInt opc2 = ifieldOPClo8( theInstr );
10710 switch (opc2) {
10775 vex_printf("dis_dfp_quantize_sig_rrnd(ppc)(opc2)\n");
10789 UInt opc2 = ifieldOPClo8( theInstr );
10804 switch (opc2) {
10870 vex_printf("dis_dfp_quantize_sig_rrndq(ppc)(opc2)\n");
10884 UInt opc2 = ifieldOPClo10( theInstr );
10899 switch (opc2) {
10915 vex_printf("dis_dfp_extract_insert(ppc)(opc2)\n");
10930 UInt opc2 = ifieldOPClo10( theInstr );
10945 switch (opc2) {
10967 vex_printf("dis_dfp_extract_insertq(ppc)(opc2)\n");
11016 vex_printf("dis_dfp_compare(ppc)(opc2)\n");
11114 vex_printf("dis_dfp_exponent_test(ppc)(opc2)\n");
11254 UInt opc2 = ifieldOPClo9( theInstr );
11319 DIP("dtstd%s %u,r%u,%u\n", opc2 == 0xc2 ? "c" : "g",
11355 DIP("dtstd%sq %u,r%u,%u\n", opc2 == 0xc2 ? "c" : "g",
11404 vex_printf("dis_dfp_class_test(ppc)(opc2)\n");
11506 if (opc2 == 0xC2) { // dtstdc, dtstdcq
11541 } else if (opc2 == 0xE2) { // dtstdg, dtstdgq
11690 UInt opc2 = ifieldOPClo10( theInstr );
11709 switch ( opc2 ) {
11943 vpanic( "ERROR: dis_dfp_bcd(ppc), undefined opc2 case " );
11951 UInt opc2 = ifieldOPClo10( theInstr );
11970 switch ( opc2 ) {
12352 vpanic( "ERROR: dis_dfp_bcdq(ppc), undefined opc2 case " );
12566 UInt opc2 = ifieldOPClo10(theInstr);
12574 switch (opc2) {
12587 vex_printf("dis_av_datastream(ppc)(opc2,dst)\n");
12598 vex_printf("dis_av_datastream(ppc)(opc2)\n");
12614 UInt opc2 = IFIELD( theInstr, 0, 11 );
12621 switch (opc2) {
12624 vex_printf("dis_av_procctl(ppc)(opc2,dst)\n");
12634 vex_printf("dis_av_procctl(ppc)(opc2,dst)\n");
12643 vex_printf("dis_av_procctl(ppc)(opc2)\n");
12653 dis_vx_conv ( UInt theInstr, UInt opc2 )
12669 switch (opc2) {
12728 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
12733 switch (opc2) {
12840 Bool un_signed = (opc2 == 0x110);
13141 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
13151 dis_vxv_dp_arith ( UInt theInstr, UInt opc2 )
13174 switch (opc2) {
13182 switch (opc2) {
13253 switch (opc2) {
13258 mdp = (opc2 & 0x0FF) == 0x0A4;
13265 mdp = (opc2 & 0x0FF) == 0x0E4;
13272 switch (opc2) {
13384 vex_printf( "dis_vxv_dp_arith(ppc)(opc2)\n" );
13394 dis_vxv_sp_arith ( UInt theInstr, UInt opc2 )
13417 switch (opc2) {
13520 switch (opc2) {
13523 msp = (opc2 & 0x0FF) == 0x024;
13530 msp = (opc2 & 0x0FF) == 0x064;
13539 switch (opc2) {
13710 vex_printf( "dis_vxv_sp_arith(ppc)(opc2)\n" );
13720 dis_av_count_bitTranspose ( UInt theInstr, UInt opc2 )
13733 switch (opc2) {
13875 vex_printf("dis_av_count_bitTranspose(ppc)(opc2)\n");
14069 static const HChar * _get_vsx_rdpi_suffix(UInt opc2)
14071 switch (opc2 & 0x7F) {
14084 vex_printf("Unrecognized opcode %x\n", opc2);
14085 vpanic("_get_vsx_rdpi_suffix(ppc)(opc2)");
14092 static IRExpr * _do_vsx_fp_roundToInt(IRTemp frB_I64, UInt opc2)
14102 switch (opc2 & 0x7F) {
14120 vex_printf("Unrecognized opcode %x\n", opc2);
14121 vpanic("_do_vsx_fp_roundToInt(ppc)(opc2)");
14184 dis_vxv_misc ( UInt theInstr, UInt opc2 )
14196 switch (opc2) {
14205 Bool redp = opc2 == 0x1B4;
14254 Bool resp = opc2 == 0x134;
14322 Bool isMin = opc2 == 0x320 ? True : False;
14371 Bool isMin = opc2 == 0x3A0 ? True : False;
14471 Bool make_negative = (opc2 == 0x3D2) ? True : False;
14498 Bool make_negative = (opc2 == 0x352) ? True : False;
14557 frD_fp_roundHi = _do_vsx_fp_roundToInt(frBHi_I64, opc2);
14559 frD_fp_roundLo = _do_vsx_fp_roundToInt(frBLo_I64, opc2);
14561 DIP("xvrdpi%s v%d,v%d\n", _get_vsx_rdpi_suffix(opc2), XT, XB);
14576 if (opc2 != 0x156) {
14578 switch (opc2) {
14597 vex_printf("Unrecognized opcode %x\n", opc2);
14598 vpanic("dis_vxv_misc(ppc)(vrspi<x>)(opc2)\n");
14619 _do_vsx_fp_roundToInt(b3_I64, opc2));
14621 _do_vsx_fp_roundToInt(b2_I64, opc2));
14623 _do_vsx_fp_roundToInt(b1_I64, opc2));
14625 _do_vsx_fp_roundToInt(b0_I64, opc2));
14640 vex_printf( "dis_vxv_misc(ppc)(opc2)\n" );
14651 dis_vxs_arith ( UInt theInstr, UInt opc2 )
14674 switch (opc2) {
14726 Bool mdp = opc2 == 0x024;
14744 Bool mdp = opc2 == 0x0A4;
14761 Bool mdp = opc2 == 0x064;
14779 Bool mdp = opc2 == 0x0E4;
14800 Bool mdp = opc2 == 0x2A4;
14820 Bool mdp = opc2 == 0x224;
14845 Bool mdp = opc2 == 0x264;
14869 Bool mdp = opc2 == 0x2E4;
14968 vex_printf( "dis_vxs_arith(ppc)(opc2)\n" );
14980 dis_vx_cmp( UInt theInstr, UInt opc2 )
14998 switch (opc2) {
15002 DIP("xscmp%sdp crf%d,fr%u,fr%u\n", opc2 == 0x08c ? "u" : "o",
15009 vex_printf( "dis_vx_cmp(ppc)(opc2)\n" );
15104 dis_vvec_cmp( UInt theInstr, UInt opc2 )
15123 switch (opc2) {
15191 vex_printf( "dis_vvec_cmp(ppc)(opc2)\n" );
15200 dis_vxs_misc( UInt theInstr, UInt opc2 )
15224 switch (opc2) {
15324 Bool isMin = opc2 == 0x2A0 ? True : False;
15343 frD_fp_round = _do_vsx_fp_roundToInt(frB_I64, opc2);
15345 DIP("xsrdpi%s v%d,v%d\n", _get_vsx_rdpi_suffix(opc2), XT, XB);
15361 Bool redp = opc2 == 0x034;
15395 Bool redp = opc2 == 0x0B4;
15436 vex_printf( "dis_vxs_misc(ppc)(opc2)\n" );
15446 dis_vx_logic ( UInt theInstr, UInt opc2 )
15464 switch (opc2) {
15506 vex_printf( "dis_vx_logic(ppc)(opc2)\n" );
15524 UInt opc2 = ifieldOPClo10( theInstr );
15536 switch (opc2) {
15642 vex_printf( "dis_vx_load(ppc)(opc2)\n" );
15661 UInt opc2 = ifieldOPClo10( theInstr );
15674 switch (opc2) {
15749 vex_printf( "dis_vx_store(ppc)(opc2)\n" );
15759 dis_vx_permute_misc( UInt theInstr, UInt opc2 )
15778 switch (opc2) {
15820 const HChar type = (opc2 == 0x48) ? 'h' : 'l';
15821 IROp word_op = (opc2 == 0x48) ? Iop_V128HIto64 : Iop_V128to64;
15870 vex_printf( "dis_vx_permute_misc(ppc)(opc2)\n" );
15886 UInt opc2 = ifieldOPClo10(theInstr);
15901 switch (opc2) {
16033 vex_printf("dis_av_load(ppc)(opc2)\n");
16049 UInt opc2 = ifieldOPClo10(theInstr);
16067 switch (opc2) {
16131 vex_printf("dis_av_store(ppc)(opc2)\n");
16147 UInt opc2 = IFIELD( theInstr, 0, 11 );
16173 switch (opc2) {
16638 vex_printf("dis_av_arith(ppc)(opc2=0x%x)\n", opc2);
16654 UInt opc2 = IFIELD( theInstr, 0, 11 );
16666 switch (opc2) {
16716 vex_printf("dis_av_logic(ppc)(opc2=0x%x)\n", opc2);
16733 UInt opc2 = IFIELD( theInstr, 0, 10 );
16746 switch (opc2) {
16820 vex_printf("dis_av_cmp(ppc)(opc2)\n");
16843 UChar opc2 = toUChar( IFIELD( theInstr, 0, 6 ) );
16879 switch (opc2) {
17092 vex_printf("dis_av_multarith(ppc)(opc2)\n");
17109 UInt opc2 = IFIELD(theInstr, 0, 11);
17123 switch (opc2) {
17146 vex_printf("dis_av_polymultarith(ppc)(opc2=0x%x)\n", opc2);
17162 UInt opc2 = IFIELD( theInstr, 0, 11 );
17174 switch (opc2) {
17304 vex_printf("dis_av_shift(ppc)(opc2)\n");
17324 UInt opc2 = toUChar( IFIELD( theInstr, 0, 6 ) );
17340 switch (opc2) {
17417 opc2 = IFIELD( theInstr, 0, 11 );
17418 switch (opc2) {
17525 vex_printf("dis_av_permute(ppc)(opc2)\n");
17541 UInt opc2 = IFIELD( theInstr, 0, 11 );
17554 switch (opc2) {
17733 switch (opc2) {
17845 vex_printf("dis_av_pack(ppc)(opc2)\n");
17861 UInt opc2 = IFIELD( theInstr, 0, 11 );
17872 switch (opc2) {
17906 vex_printf("dis_av_cipher(ppc)(opc2)\n");
17924 UInt opc2 = IFIELD( theInstr, 0, 11 );
17935 switch (opc2) {
17948 vex_printf("dis_av_hash(ppc)(opc2)\n");
18046 UInt opc2 = IFIELD( theInstr, 0, 11 );
18060 switch (opc2) {
18162 opc2 = IFIELD( theInstr, 0, 6 );
18166 switch (opc2) {
18225 vex_printf("dis_av_quad(ppc)(opc2.2)\n");
18248 UInt opc2 = IFIELD( theInstr, 0, 9 );
18261 switch (opc2) {
18277 vex_printf("dis_av_bcd(ppc)(opc2)\n");
18294 UInt opc2=0;
18311 opc2 = IFIELD( theInstr, 0, 6 );
18312 switch (opc2) {
18338 opc2 = IFIELD( theInstr, 0, 11 );
18339 switch (opc2) {
18372 switch (opc2) {
18394 vex_printf("dis_av_fp_arith(ppc)(opc2=0x%x)\n",opc2);
18411 UInt opc2 = IFIELD( theInstr, 0, 10 );
18426 switch (opc2) {
18482 vex_printf("dis_av_fp_cmp(ppc)(opc2)\n");
18504 UInt opc2 = IFIELD( theInstr, 0, 11 );
18526 switch (opc2) {
18567 switch (opc2) {
18589 vex_printf("dis_av_fp_convert(ppc)(opc2)\n");
18601 UInt opc2 = IFIELD( theInstr, 1, 10 );
18603 switch (opc2) {
19011 UInt opc2;
19173 /* We don't know what it is. Set opc1/opc2 so decode_failure
19177 opc2 = ifieldOPClo10(theInstr);
19184 opc2 = ifieldOPClo10(theInstr);
19290 opc2 = ifieldOPClo10(theInstr);
19292 switch (opc2) {
19349 opc2 = ifieldOPClo9( theInstr );
19350 switch (opc2) {
19365 opc2 = ifieldOPClo8( theInstr );
19366 switch (opc2) {
19387 break; /* fall through to next opc2 check */
19390 opc2 = IFIELD(theInstr, 1, 5);
19391 switch (opc2) {
19428 UInt vsxOpc2 = get_VSX60_opc2(opc2);
19571 opc2 = IFIELD(theInstr, 1, 5);
19572 switch (opc2) {
19602 opc2 = IFIELD(theInstr, 1, 10);
19603 switch (opc2) {
19715 opc2 = ifieldOPClo9( theInstr );
19716 switch (opc2) {
19733 opc2 = ifieldOPClo8( theInstr );
19734 switch (opc2) {
19760 switch (opc2) {
19791 opc2 = IFIELD(theInstr, 1, 9);
19792 switch (opc2) {
19833 opc2 = IFIELD(theInstr, 1, 10);
19834 switch (opc2) {
20124 opc2 = IFIELD(theInstr, 0, 6);
20125 switch (opc2) {
20163 opc2 = IFIELD(theInstr, 0, 9);
20164 switch (opc2) {
20175 opc2 = IFIELD(theInstr, 0, 11);
20176 switch (opc2) {
20319 if (dis_av_count_bitTranspose( theInstr, opc2 )) goto decode_success;
20325 if (dis_av_count_bitTranspose( theInstr, opc2 )) goto decode_success;
20330 if (dis_av_count_bitTranspose( theInstr, opc2 )) goto decode_success;
20344 opc2 = IFIELD(theInstr, 0, 10);
20345 switch (opc2) {
20432 opc2 = (theInstr) & 0x7FF;
20437 opc1, opc1, opc2, opc2);
