Lines Matching refs:stmt
3515 static void iselStmt ( ISelEnv* env, IRStmt* stmt )
3519 ppIRStmt(stmt);
3522 switch (stmt->tag) {
3527 IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr);
3528 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data);
3529 IREndness end = stmt->Ist.Store.end;
3535 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
3536 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd);
3541 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
3542 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd);
3547 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
3548 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd);
3553 HReg rD = iselIntExpr_R(env, stmt->Ist.Store.data);
3554 ARM64AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr, tyd);
3559 HReg qD = iselV128Expr(env, stmt->Ist.Store.data);
3560 HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr);
3565 HReg dD = iselDblExpr(env, stmt->Ist.Store.data);
3566 HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr);
3571 HReg sD = iselFltExpr(env, stmt->Ist.Store.data);
3572 HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr);
3582 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Put.data);
3583 UInt offs = (UInt)stmt->Ist.Put.offset;
3585 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
3591 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
3597 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
3603 HReg rD = iselIntExpr_R(env, stmt->Ist.Put.data);
3609 HReg qD = iselV128Expr(env, stmt->Ist.Put.data);
3615 HReg dD = iselDblExpr(env, stmt->Ist.Put.data);
3621 HReg sD = iselFltExpr(env, stmt->Ist.Put.data);
3627 HReg hD = iselF16Expr(env, stmt->Ist.Put.data);
3639 IRTemp tmp = stmt->Ist.WrTmp.tmp;
3645 HReg rD = iselIntExpr_R(env, stmt->Ist.WrTmp.data);
3665 ARM64CondCode cc = iselCondCode(env, stmt->Ist.WrTmp.data);
3670 HReg src = iselDblExpr(env, stmt->Ist.WrTmp.data);
3676 HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data);
3682 HReg src = iselV128Expr(env, stmt->Ist.WrTmp.data);
3689 iselV256Expr(&srcHi,&srcLo, env, stmt->Ist.WrTmp.data);
3701 IRDirty* d = stmt->Ist.Dirty.details;
3774 if (stmt->Ist.LLSC.storedata == NULL) {
3776 IRTemp res = stmt->Ist.LLSC.result;
3782 HReg raddr = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
3798 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.LLSC.storedata);
3802 HReg rD = iselIntExpr_R(env, stmt->Ist.LLSC.storedata);
3803 HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr);
3820 IRTemp res = stmt->Ist.LLSC.result;
3838 switch (stmt->Ist.MBE.event) {
3864 if (stmt->Ist.Exit.dst->tag != Ico_U64)
3868 = iselCondCode(env, stmt->Ist.Exit.guard);
3870 = mk_baseblock_64bit_access_amode(stmt->Ist.Exit.offsIP);
3873 if (stmt->Ist.Exit.jk == Ijk_Boring) {
3879 = ((Addr64)stmt->Ist.Exit.dst->Ico.U64) > env->max_ga;
3881 addInstr(env, ARM64Instr_XDirect(stmt->Ist.Exit.dst->Ico.U64,
3887 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
3894 switch (stmt->Ist.Exit.jk) {
3904 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
3906 stmt->Ist.Exit.jk));
3920 ppIRStmt(stmt);
