Lines Matching refs:am
456 MIPSAMode *am = LibVEX_Alloc_inline(sizeof(MIPSAMode));
457 am->tag = Mam_IR;
458 am->Mam.IR.base = base;
459 am->Mam.IR.index = idx;
461 return am;
466 MIPSAMode *am = LibVEX_Alloc_inline(sizeof(MIPSAMode));
467 am->tag = Mam_RR;
468 am->Mam.RR.base = base;
469 am->Mam.RR.index = idx;
471 return am;
474 MIPSAMode *dopyMIPSAMode(MIPSAMode * am)
477 switch (am->tag) {
479 ret = MIPSAMode_IR(am->Mam.IR.index, am->Mam.IR.base);
482 ret = MIPSAMode_RR(am->Mam.RR.index, am->Mam.RR.base);
491 MIPSAMode *nextMIPSAModeFloat(MIPSAMode * am)
494 switch (am->tag) {
496 ret = MIPSAMode_IR(am->Mam.IR.index + 4, am->Mam.IR.base);
509 MIPSAMode *nextMIPSAModeInt(MIPSAMode * am)
512 switch (am->tag) {
514 ret = MIPSAMode_IR(am->Mam.IR.index + 4, am->Mam.IR.base);
527 void ppMIPSAMode(MIPSAMode * am, Bool mode64)
529 switch (am->tag) {
531 if (am->Mam.IR.index == 0)
534 vex_printf("%d(", (Int) am->Mam.IR.index);
535 ppHRegMIPS(am->Mam.IR.base, mode64);
539 ppHRegMIPS(am->Mam.RR.base, mode64);
541 ppHRegMIPS(am->Mam.RR.index, mode64);
549 static void addRegUsage_MIPSAMode(HRegUsage * u, MIPSAMode * am)
551 switch (am->tag) {
553 addHRegUse(u, HRmRead, am->Mam.IR.base);
556 addHRegUse(u, HRmRead, am->Mam.RR.base);
557 addHRegUse(u, HRmRead, am->Mam.RR.index);
565 static void mapRegs_MIPSAMode(HRegRemap * m, MIPSAMode * am)
567 switch (am->tag) {
569 am->Mam.IR.base = lookupHRegRemap(m, am->Mam.IR.base);
572 am->Mam.RR.base = lookupHRegRemap(m, am->Mam.RR.base);
573 am->Mam.RR.index = lookupHRegRemap(m, am->Mam.RR.index);
1974 MIPSAMode *am;
1978 am = MIPSAMode_IR(offsetB, GuestStatePointer(mode64));
1983 *i1 = MIPSInstr_Store(8, am, rreg, mode64);
1987 *i1 = MIPSInstr_Store(4, am, rreg, mode64);
1991 *i1 = MIPSInstr_FpLdSt(False /*Store */ , 4, rreg, am);
1994 *i1 = MIPSInstr_FpLdSt(False /*Store */ , 8, rreg, am);
2006 MIPSAMode *am;
2008 am = MIPSAMode_IR(offsetB, GuestStatePointer(mode64));
2013 *i1 = MIPSInstr_Load(8, rreg, am, mode64);
2017 *i1 = MIPSInstr_Load(4, rreg, am, mode64);
2021 *i1 = MIPSInstr_FpLdSt(True /*Load */ , 8, rreg, am);
2023 *i1 = MIPSInstr_FpLdSt(True /*Load */ , 4, rreg, am);
2026 *i1 = MIPSInstr_FpLdSt(True /*Load */ , 8, rreg, am);
2169 static UChar *doAMode_IR(UChar * p, UInt opc1, UInt rSD, MIPSAMode * am,
2173 vassert(am->tag == Mam_IR);
2174 vassert(am->Mam.IR.index < 0x10000);
2176 rA = iregNo(am->Mam.IR.base, mode64);
2177 idx = am->Mam.IR.index;
2209 static UChar *doAMode_RR(UChar * p, UInt opc1, UInt rSD, MIPSAMode * am,
2213 vassert(am->tag == Mam_RR);
2215 rA = iregNo(am->Mam.RR.base, mode64);
2216 rB = iregNo(am->Mam.RR.index, mode64);
2407 MIPSAMode* am, Bool mode64 )
2410 switch (am->tag) {
2413 vassert(0 == (am->Mam.IR.index & 3));
2415 p = doAMode_IR(p, mode64 ? 55 : 35, reg, am, mode64);
2427 switch (am->tag) {
2430 vassert(0 == (am->Mam.IR.index & 3));
2432 p = doAMode_IR(p, mode64 ? 63 : 43, reg, am, mode64);
2450 MIPSAMode* am, Bool mode64 )
2453 switch (am->tag) {
2456 vassert(0 == (am->Mam.IR.index & 3));
2458 p = doAMode_IR(p, 35, reg, am, mode64);
2470 switch (am->tag) {
2473 vassert(0 == (am->Mam.IR.index & 3));
2475 p = doAMode_IR(p, 43, reg, am, mode64);
