Lines Matching refs:Binop
722 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64
723 && e->Iex.Binop.arg2->tag == Iex_Const
724 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64
726 uLong_is_4_aligned(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64) : True)
727 && uLong_fits_in_16_bits(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)) {
728 return MIPSAMode_IR((Int) e->Iex.Binop.arg2->Iex.Const.con->Ico.U64,
729 iselWordExpr_R(env, e->Iex.Binop.arg1));
733 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add64) {
734 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
735 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
743 && e->Iex.Binop.op == Iop_Add32
744 && e->Iex.Binop.arg2->tag == Iex_Const
745 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32
746 && uInt_fits_in_16_bits(e->Iex.Binop.arg2->Iex.Const.con-> Ico.U32)) {
747 return MIPSAMode_IR((Int) e->Iex.Binop.arg2->Iex.Const.con->Ico.U32,
748 iselWordExpr_R(env, e->Iex.Binop.arg1));
752 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_Add32) {
753 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
754 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
827 switch (e->Iex.Binop.op) {
878 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
887 e->Iex.Binop.arg2);
893 e->Iex.Binop.arg2);
903 switch (e->Iex.Binop.op) {
924 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
927 ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
929 ri_srcR = iselWordExpr_RH5u(env, e->Iex.Binop.arg2);
964 if (e->Iex.Binop.op == Iop_CmpEQ32
965 || e->Iex.Binop.op == Iop_CmpEQ16
966 || e->Iex.Binop.op == Iop_CmpNE32
967 || e->Iex.Binop.op == Iop_CmpNE64
968 || e->Iex.Binop.op == Iop_CmpLT32S
969 || e->Iex.Binop.op == Iop_CmpLT32U
970 || e->Iex.Binop.op == Iop_CmpLT64U
971 || e->Iex.Binop.op == Iop_CmpLE32U
972 || e->Iex.Binop.op == Iop_CmpLE32S
973 || e->Iex.Binop.op == Iop_CmpLE64S
974 || e->Iex.Binop.op == Iop_CmpLT64S
975 || e->Iex.Binop.op == Iop_CmpEQ64
976 || e->Iex.Binop.op == Iop_CasCmpEQ32
977 || e->Iex.Binop.op == Iop_CasCmpEQ64) {
979 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
980 || e->Iex.Binop.op == Iop_CmpLE32S
981 || e->Iex.Binop.op == Iop_CmpLT64S
982 || e->Iex.Binop.op == Iop_CmpLE64S);
985 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
986 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
990 switch (e->Iex.Binop.op) {
1049 if (e->Iex.Binop.op == Iop_Max32U) {
1052 HReg argL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1053 HReg argR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1055 e->Iex.Binop.arg2);
1067 if (e->Iex.Binop.op == Iop_Mul32 || e->Iex.Binop.op == Iop_Mul64) {
1068 Bool sz32 = (e->Iex.Binop.op == Iop_Mul32);
1070 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1071 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1079 if (e->Iex.Binop.op == Iop_MullU32 || e->Iex.Binop.op == Iop_MullS32) {
1087 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS32);
1088 Bool size = toBool(e->Iex.Binop.op == Iop_MullS32)
1089 || toBool(e->Iex.Binop.op == Iop_MullU32);
1090 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1091 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1113 if (e->Iex.Binop.op == Iop_CmpF64) {
1116 r_srcL = iselFltExpr(env, e->Iex.Binop.arg1);
1117 r_srcR = iselFltExpr(env, e->Iex.Binop.arg2);
1119 r_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
1120 r_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
1197 if (e->Iex.Binop.op == Iop_DivModU64to32 ||
1198 e->Iex.Binop.op == Iop_DivModS64to32) {
1205 Bool syned = toBool(e->Iex.Binop.op == Iop_DivModS64to32);
1207 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1208 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1227 if (e->Iex.Binop.op == Iop_8HLto16
1228 || e->Iex.Binop.op == Iop_16HLto32) {
1229 HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1230 HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1236 switch (e->Iex.Binop.op) {
1261 if (e->Iex.Binop.op == Iop_32HLto64) {
1263 HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1264 HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1282 if (e->Iex.Binop.op == Iop_F32toI64S) {
1286 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
1289 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
1300 if (e->Iex.Binop.op == Iop_F64toI32S) {
1303 valD = iselFltExpr(env, e->Iex.Binop.arg2);
1305 valD = iselDblExpr(env, e->Iex.Binop.arg2);
1310 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
1324 switch (e->Iex.Binop.op) {
1351 Binop.arg1);
1352 HReg regR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1482 valD = iselFltExpr(env, e->Iex.Binop.arg2);
1484 valD = iselDblExpr(env, e->Iex.Binop.arg2);
1488 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
2050 if (e->Iex.Binop.op == Iop_CmpEQ32
2051 || e->Iex.Binop.op == Iop_CmpNE32
2052 || e->Iex.Binop.op == Iop_CmpNE64
2053 || e->Iex.Binop.op == Iop_CmpLT32S
2054 || e->Iex.Binop.op == Iop_CmpLT32U
2055 || e->Iex.Binop.op == Iop_CmpLT64U
2056 || e->Iex.Binop.op == Iop_CmpLE32S
2057 || e->Iex.Binop.op == Iop_CmpLE64S
2058 || e->Iex.Binop.op == Iop_CmpLT64S
2059 || e->Iex.Binop.op == Iop_CmpEQ64
2060 || e->Iex.Binop.op == Iop_CasCmpEQ32
2061 || e->Iex.Binop.op == Iop_CasCmpEQ64) {
2063 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
2064 || e->Iex.Binop.op == Iop_CmpLE32S
2065 || e->Iex.Binop.op == Iop_CmpLT64S
2066 || e->Iex.Binop.op == Iop_CmpLE64S);
2069 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2070 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
2074 switch (e->Iex.Binop.op) {
2132 if (e->Iex.Binop.op == Iop_Not1) {
2200 switch (e->Iex.Binop.op) {
2206 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS64);
2208 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2209 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2221 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2222 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2226 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2227 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2230 Bool syned = toBool(e->Iex.Binop.op == Iop_DivModS64to64);
2244 iselInt128Expr(&rHi1, &rLo1, env, e->Iex.Binop.arg1);
2246 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2249 Bool syned = toBool(e->Iex.Binop.op == Iop_DivModS128to64);
2377 IROp op_binop = e->Iex.Binop.op;
2393 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2394 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2418 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2419 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2440 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2441 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2459 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2461 iselInt64Expr(&r_sHi, &r_sLo, env, e->Iex.Binop.arg1);
2473 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2474 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2486 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2487 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2519 iselInt64Expr(&a1, &a0, env, e->Iex.Binop.arg1);
2520 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2583 iselInt64Expr(&a0, &a1, env, e->Iex.Binop.arg1);
2584 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2651 iselInt64Expr(&a1, &a0, env, e->Iex.Binop.arg1);
2652 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2719 iselInt64Expr(&a1, &a0, env, e->Iex.Binop.arg1);
2720 sa = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
2766 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
2772 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3177 switch (e->Iex.Binop.op) {
3181 valD = iselFltExpr(env, e->Iex.Binop.arg2);
3183 valD = iselDblExpr(env, e->Iex.Binop.arg2);
3186 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3194 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
3196 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3204 HReg valF = iselFltExpr(env, e->Iex.Binop.arg2);
3206 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3214 HReg fr_src = iselWordExpr_R(env, e->Iex.Binop.arg2);
3221 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3234 fr_src = iselWordExpr_R(env, e->Iex.Binop.arg2);
3250 iselInt64Expr(&Hi, &Lo, env, e->Iex.Binop.arg2);
3254 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3267 fr_src = iselWordExpr_R(env, e->Iex.Binop.arg2);
3283 iselInt64Expr(&Hi, &Lo, env, e->Iex.Binop.arg2);
3287 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3296 Bool sz32 = e->Iex.Binop.op == Iop_SqrtF32;
3297 HReg src = iselFltExpr(env, e->Iex.Binop.arg2);
3299 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3506 switch (e->Iex.Binop.op) {
3508 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
3511 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
3519 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
3521 set_MIPS_rounding_mode(env, e->Iex.Binop.arg1);
