Lines Matching full:iex
278 if (guard->tag == Iex_Const && guard->Iex.Const.con->tag == Ico_U1
279 && guard->Iex.Const.con->Ico.U1 == True) {
333 if (guard->tag == Iex_Const && guard->Iex.Const.con->tag == Ico_U1
334 && guard->Iex.Const.con->Ico.U1 == True) {
408 && e->Iex.Binop.op == Iop_Add64
409 && e->Iex.Binop.arg2->tag == Iex_Const
410 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64
411 && uInt_fits_in_16_bits(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)) {
413 return TILEGXAMode_IR((Long) e->Iex.Binop.arg2->Iex.Const.con->Ico.U64,
414 iselWordExpr_R(env, e->Iex.Binop.arg1));
461 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
466 TILEGXAMode *am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, ty);
468 if (e->Iex.Load.end != Iend_LE
469 && e->Iex.Load.end != Iend_BE)
482 switch (e->Iex.Binop.op) {
528 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
535 Iex.Binop.arg2);
541 e->Iex.Binop.arg2);
551 switch (e->Iex.Binop.op) {
577 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
584 //ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
588 //if (e->Iex.Binop.arg2->tag == GXrh_Imm)
590 // ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
593 ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
613 if (e->Iex.Binop.op == Iop_CasCmpEQ32
614 || e->Iex.Binop.op == Iop_CmpEQ32
615 || e->Iex.Binop.op == Iop_CasCmpNE32
616 || e->Iex.Binop.op == Iop_CmpNE32
617 || e->Iex.Binop.op == Iop_CmpNE64
618 || e->Iex.Binop.op == Iop_CmpLT32S
619 || e->Iex.Binop.op == Iop_CmpLT32U
620 || e->Iex.Binop.op == Iop_CmpLT64U
621 || e->Iex.Binop.op == Iop_CmpLE32S
622 || e->Iex.Binop.op == Iop_CmpLE64S
623 || e->Iex.Binop.op == Iop_CmpLE64U
624 || e->Iex.Binop.op == Iop_CmpLT64S
625 || e->Iex.Binop.op == Iop_CmpEQ64
626 || e->Iex.Binop.op == Iop_CasCmpEQ64
627 || e->Iex.Binop.op == Iop_CasCmpNE64) {
629 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
630 || e->Iex.Binop.op == Iop_CmpLE32S
631 || e->Iex.Binop.op == Iop_CmpLT64S
632 || e->Iex.Binop.op == Iop_CmpLE64S);
635 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
636 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
639 switch (e->Iex.Binop.op) {
700 if (e->Iex.Binop.op == Iop_CmpEQ8x8) {
706 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
707 TILEGXRH *r2 = iselWordExpr_RH(env, True, e->Iex.Binop.arg2);
710 switch (e->Iex.Binop.op) {
726 if (e->Iex.Binop.op == Iop_Max32U) {
732 HReg argL = iselWordExpr_R(env, e->Iex.Binop.arg1);
734 e->Iex.Binop.arg2);
746 if (e->Iex.Binop.op == Iop_MullS32 || e->Iex.Binop.op == Iop_MullU32) {
747 Bool syned = (e->Iex.Binop.op == Iop_MullS32);
748 Bool sz32 = (e->Iex.Binop.op == Iop_Mul32);
750 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
751 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
759 if (e->Iex.Binop.op == Iop_32HLto64) {
760 HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
761 HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
786 IROp op_unop = e->Iex.Unop.op;
791 HReg r_srcL = iselWordExpr_R(env, e->Iex.Unop.arg);
805 HReg r_srcL = iselWordExpr_R(env, e->Iex.Unop.arg);
820 r1 = iselWordExpr_R(env, e->Iex.Unop.arg);
836 return iselWordExpr_R(env, e->Iex.Unop.arg);
842 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
853 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
854 Bool srcIs16 = toBool( e->Iex.Unop.op==Iop_16Uto32
855 || e->Iex.Unop.op==Iop_16Uto64 );
868 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
877 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
887 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
896 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
904 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
912 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
921 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
935 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
948 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
966 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
977 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
988 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1003 tmp1 = iselWordExpr_R(env, e->Iex.Unop.arg);
1028 am_addr = TILEGXAMode_IR(e->Iex.Get.offset,
1040 typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1) {
1042 HReg r0 = iselWordExpr_R(env, e->Iex.ITE.iffalse);
1043 HReg r1 = iselWordExpr_R(env, e->Iex.ITE.iftrue);
1044 HReg r_cond = iselWordExpr_R(env, e->Iex.ITE.cond);
1061 IRConst *con = e->Iex.Const.con;
1086 vassert(ty == e->Iex.CCall.retty);
1089 doHelperCall(env, NULL, e->Iex.CCall.cee, e->Iex.CCall.args,
1090 e->Iex.CCall.retty);
1152 IRConst *con = e->Iex.Const.con;
1220 if(e->Iex.Const.con->tag == Ico_U8
1221 && e->Iex.Const.con->Ico.U8 >= 1 && e->Iex.Const.con->Ico.U8 <= 63)
1222 return TILEGXRH_Imm(False /*unsigned */ , e->Iex.Const.con->Ico.U8);
1226 if(e->Iex.Const.con->tag == Ico_U64
1227 && e->Iex.Const.con->Ico.U64 >= 1
1228 && e->Iex.Const.con->Ico.U64 <= 63)
1229 return TILEGXRH_Imm(False /*unsigned */, e->Iex.Const.con->Ico.U64);
1257 if (e->Iex.Binop.op == Iop_CmpEQ32
1258 || e->Iex.Binop.op == Iop_CmpNE32
1259 || e->Iex.Binop.op == Iop_CmpNE64
1260 || e->Iex.Binop.op == Iop_CmpLT32S
1261 || e->Iex.Binop.op == Iop_CmpLT32U
1262 || e->Iex.Binop.op == Iop_CmpLT64U
1263 || e->Iex.Binop.op == Iop_CmpLE32S
1264 || e->Iex.Binop.op == Iop_CmpLE64S
1265 || e->Iex.Binop.op == Iop_CmpLT64S
1266 || e->Iex.Binop.op == Iop_CmpEQ64
1267 || e->Iex.Binop.op == Iop_CasCmpEQ32
1268 || e->Iex.Binop.op == Iop_CasCmpEQ64) {
1270 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
1271 || e->Iex.Binop.op == Iop_CmpLE32S
1272 || e->Iex.Binop.op == Iop_CmpLT64S
1273 || e->Iex.Binop.op == Iop_CmpLE64S);
1276 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
1277 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
1281 switch (e->Iex.Binop.op) {
1341 if (e->Iex.Binop.op == Iop_Not1) {
1343 HReg r_srcL = iselWordExpr_R(env, e->Iex.Unop.arg);
1378 if (e->tag == Iex_Const && e->Iex.Const.con->Ico.U1 == True)
1542 if((sz == 8 && cas->expdLo->Iex.Const.con->Ico.U64 == 0) ||
1543 (sz == 4 && cas->expdLo->Iex.Const.con->Ico.U32 == 0))
1549 else if((sz == 8 && cas->expdLo->Iex.Const.con->Ico.U64 == 2) ||
1550 (sz == 4 && cas->expdLo->Iex.Const.con->Ico.U32 == 2))
1556 else if((sz == 8 && cas->expdLo->Iex.Const.con->Ico.U64 == 3) ||
1557 (sz == 4 && cas->expdLo->Iex.Const.con->Ico.U32 == 3))
1563 else if((sz == 8 && cas->expdLo->Iex.Const.con->Ico.U64 == 4) ||
1564 (sz == 4 && cas->expdLo->Iex.Const.con->Ico.U32 == 4))
1570 else if((sz == 8 && cas->expdLo->Iex.Const.con->Ico.U64 == 5) ||
1571 (sz == 4 && cas->expdLo->Iex.Const.con->Ico.U32 == 5))
1691 IRConst* cdst = next->Iex.Const.con;
