Lines Matching refs:V128
304 UShort V128; /* 16-bit value; see Ico_V128 comment above */
500 Iop_DivModU128to64, // :: V128,I64 -> V128
1267 /* BCD arithmetic instructions, (V128, V128) -> V128
1283 /* ternary :: IRRoundingMode(I32) x V128 x V128 -> V128 */
1301 /* binary :: IRRoundingMode(I32) x V128 -> V128 */
1357 /* ternary :: IRRoundingMode(I32) x V128 x V128 -> V128 */
1368 /* binary :: IRRoundingMode(I32) x V128 -> V128 */
1393 Iop_V128to64, // :: V128 -> I64, low half
1394 Iop_V128HIto64, // :: V128 -> I64, high half
1395 Iop_64HLtoV128, // :: (I64,I64) -> V128
1401 Iop_ZeroHI64ofV128, // :: V128 -> V128
1402 Iop_ZeroHI96ofV128, // :: V128 -> V128
1403 Iop_ZeroHI112ofV128, // :: V128 -> V128
1404 Iop_ZeroHI120ofV128, // :: V128 -> V128
1408 Iop_V128to32, // :: V128 -> I32, lowest lane
1409 Iop_SetV128lo32, // :: (V128,I32) -> V128
1451 /* Widening multiplies, all of the form (I64, I64) -> V128 */
1456 /* Signed doubling saturating widening multiplies, (I64, I64) -> V128 */
1472 Iop_QDMulHi16Sx8, Iop_QDMulHi32Sx4, /* (V128, V128) -> V128 */
1473 Iop_QRDMulHi16Sx8, Iop_QRDMulHi32Sx4, /* (V128, V128) -> V128 */
1477 Iop_PolynomialMul8x16, /* (V128, V128) -> V128 */
1478 Iop_PolynomialMull8x8, /* (I64, I64) -> V128 */
1480 /* Vector Polynomial multiplication add. (V128, V128) -> V128
1528 /* Vector bit matrix transpose. (V128) -> V128 */
1588 /* All of type (V128, V128) -> V256. */
1599 of which the lower V128 is the shift result, and Q occupies the
1600 least significant bit of the upper V128. All other bits of the
1601 upper V128 are zero. */
1617 /* All of type (V128, V128) -> V128 */
1645 /* All of type (V128, I8) -> V128 */
1657 saturation occurred, and the shift result. The result type is V128,
1691 /* NARROWING (unary) -- narrow V128 into I64 */
1704 All operations are I64->V128.
1733 GET is binop (V128, I8) -> I<elem_size> */
1745 Iop_SliceV128, // (V128, V128, I8) -> V128
1766 Iop_GetMSBs8x16, /* V128 -> I16 */
1783 Iop_V256toV128_0, // V256 -> V128, less significant lane
1784 Iop_V256toV128_1, // V256 -> V128, more significant lane
1785 Iop_V128HLtoV256, // (V128,V128)->V256, first arg is most signif
1822 /* (V128, V128) -> V128 */
1828 /* (V128, I8) -> V128; The I8 input arg is (ST | SIX), where ST and
2095 be able to return V128 or V256 values. Hence this is not allowed.
2144 (naturally aligned) V128 or V256, into which the helper is expected
2146 controlled. If the helper returns a V128 or V256 value then
