Lines Matching refs:reg_val2
28 TEST2("drotr $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
29 TEST2("drotr $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
30 TEST2("drotr $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
31 TEST2("drotr $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
41 TEST2("drotr32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
42 TEST2("drotr32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
43 TEST2("drotr32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
44 TEST2("drotr32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
52 TEST1("drotrv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
61 TEST2("dsll $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
62 TEST2("dsll $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
63 TEST2("dsll $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
64 TEST2("dsll $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
72 TEST2("dsll32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
73 TEST2("dsll32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
74 TEST2("dsll32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
75 TEST2("dsll32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
81 TEST1("dsllv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
90 TEST2("dsra $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
91 TEST2("dsra $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
92 TEST2("dsra $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
93 TEST2("dsra $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
101 TEST2("dsra32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
102 TEST2("dsra32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
103 TEST2("dsra32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
104 TEST2("dsra32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
110 TEST1("dsrav $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
119 TEST2("dsrl $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
120 TEST2("dsrl $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
121 TEST2("dsrl $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
122 TEST2("dsrl $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
130 TEST2("dsrl32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
131 TEST2("dsrl32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
132 TEST2("dsrl32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
133 TEST2("dsrl32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
139 TEST1("dsrlv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
164 TEST2("sll $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
165 TEST2("sll $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
166 TEST2("sll $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
167 TEST2("sll $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
173 TEST1("sllv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
