Lines Matching refs:reg
139 uint8_t MPU60X0::readReg(uint8_t reg)
141 return m_i2c.readReg(reg);
144 void MPU60X0::readRegs(uint8_t reg, uint8_t *buffer, int len)
146 m_i2c.readBytesReg(reg, buffer, len);
149 bool MPU60X0::writeReg(uint8_t reg, uint8_t val)
152 if ((rv = m_i2c.writeReg(reg, val)) != mraa::SUCCESS)
164 uint8_t reg = readReg(REG_PWR_MGMT_1);
167 reg |= PWR_SLEEP;
169 reg &= ~PWR_SLEEP;
171 return writeReg(REG_PWR_MGMT_1, reg);
176 uint8_t reg = readReg(REG_PWR_MGMT_1);
178 reg &= ~(_CLKSEL_MASK << _CLKSEL_SHIFT);
180 reg |= (clk << _CLKSEL_SHIFT);
182 return writeReg(REG_PWR_MGMT_1, reg);
187 uint8_t reg = readReg(REG_GYRO_CONFIG);
189 reg &= ~(_FS_SEL_MASK << _FS_SEL_SHIFT);
191 reg |= (scale << _FS_SEL_SHIFT);
193 if (!writeReg(REG_GYRO_CONFIG, reg))
230 uint8_t reg = readReg(REG_ACCEL_CONFIG);
232 reg &= ~(_AFS_SEL_MASK << _AFS_SEL_SHIFT);
234 reg |= (scale << _AFS_SEL_SHIFT);
236 if (!writeReg(REG_ACCEL_CONFIG, reg))
273 uint8_t reg = readReg(REG_CONFIG);
275 reg &= ~(_CONFIG_DLPF_MASK << _CONFIG_DLPF_SHIFT);
277 reg |= (dlp << _CONFIG_DLPF_SHIFT);
279 return writeReg(REG_CONFIG, reg);
324 uint8_t reg = readReg(REG_PWR_MGMT_1);
327 reg &= ~TEMP_DIS;
329 reg |= TEMP_DIS;
331 return writeReg(REG_PWR_MGMT_1, reg);
336 uint8_t reg = readReg(REG_CONFIG);
338 reg &= ~(_CONFIG_EXT_SYNC_SET_MASK << _CONFIG_EXT_SYNC_SET_SHIFT);
340 reg |= (val << _CONFIG_EXT_SYNC_SET_SHIFT);
342 return writeReg(REG_CONFIG, reg);
347 uint8_t reg = readReg(REG_INT_PIN_CFG);
350 reg |= I2C_BYPASS_ENABLE;
352 reg &= ~I2C_BYPASS_ENABLE;
354 return writeReg(REG_INT_PIN_CFG, reg);
