Lines Matching refs:__v8si
46 return (__m256i)__builtin_ia32_pabsd256((__v8si)__a);
58 return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b);
70 return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2);
88 return (__m256i)((__v8si)__a + (__v8si)__b);
177 return (__m256i)((__v8si)__a == (__v8si)__b);
201 return (__m256i)((__v8si)__a > (__v8si)__b);
219 return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b);
237 return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b);
273 return (__m256i)__builtin_ia32_pmaxsd256((__v8si)__a, (__v8si)__b);
291 return (__m256i)__builtin_ia32_pmaxud256((__v8si)__a, (__v8si)__b);
309 return (__m256i)__builtin_ia32_pminsd256((__v8si)__a, (__v8si)__b);
327 return (__m256i)__builtin_ia32_pminud256((__v8si)__a, (__v8si)__b);
411 return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b);
441 return (__m256i)((__v8si)__a * (__v8si)__b);
447 return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b);
470 (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)_mm256_set1_epi32(0), \
519 return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b);
541 return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count);
547 return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count);
577 return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count);
583 return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count);
605 return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count);
611 return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count);
641 return (__m256i)((__v8si)__a - (__v8si)__b);
689 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7);
713 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5);
766 (__m256i)__builtin_ia32_pblendd256((__v8si)__V1, (__v8si)__V2, (M)); })
820 return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b);
858 return (__m256i)__builtin_ia32_maskloadd256((const __v8si *)__X, (__v8si)__M);
882 __builtin_ia32_maskstored256((__v8si *)__X, (__v8si)__M, (__v8si)__Y);
906 return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y);
930 return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y);
942 return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y);
1009 (__v8si)__i, (__v8sf)__mask, (s)); })
1040 (__m256i)__builtin_ia32_gatherd_d256((__v8si)__a, (const __v8si *)__m, \
1041 (__v8si)__i, (__v8si)__mask, (s)); })
1130 (const __v8sf *)__m, (__v8si)__i, \
1157 (__m256i)__builtin_ia32_gatherd_d256((__v8si)_mm256_setzero_si256(), \
1158 (const __v8si *)__m, (__v8si)__i, \
1159 (__v8si)_mm256_set1_epi32(-1), (s)); })
