Lines Matching refs:insn
36 const CGEN_INSN * insn;
199 mt_insn insn;
205 insn.insn = mt_cgen_assemble_insn
206 (gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
208 if (!insn.insn)
215 gas_cgen_finish_insn (insn.insn, insn.buffer,
216 CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
224 && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_MEMORY_ACCESS)
227 CGEN_INSN_NAME (insn.insn));
231 && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_IO_INSN))
233 CGEN_INSN_NAME (insn.insn));
237 && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN))
238 as_warn (_("%s may not occupy the delay slot of another branch insn."),
239 CGEN_INSN_NAME (insn.insn));
244 if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)
245 && insn.fields.f_sr1 == delayed_load_register)
247 insn.fields.f_sr1);
249 if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)
250 && insn.fields.f_sr2 == delayed_load_register)
252 insn.fields.f_sr2);
257 && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_JAL_HAZARD))
259 if ((CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)
260 && insn.fields.f_sr1 == delayed_load_register)
261 || (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)
262 && insn.fields.f_sr2 == delayed_load_register))
265 else if ((CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)
266 && insn.fields.f_sr1 == prev_delayed_load_register)
267 || (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)
268 && insn.fields.f_sr2 == prev_delayed_load_register))
278 && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN)
281 if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR1)
282 && insn.fields.f_sr1 == delayed_load_register)
283 as_warn (_("conditional branch or jal insn's operand references R%ld of previous arithmetic or logic insn."),
284 insn.fields.f_sr1);
286 if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2)
287 && insn.fields.f_sr2 == delayed_load_register)
288 as_warn (_("conditional branch or jal insn's operand references R%ld of previous arithmetic or logic insn."),
289 insn.fields.f_sr2);
293 /* Keep track of details of this insn for processing next insn. */
298 CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
302 CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_LOAD_DELAY);
305 CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_MEMORY_ACCESS);
308 CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_IO_INSN);
311 CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_AL_INSN);
314 CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN);
317 CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_BR_INSN)
318 && CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRSR2);
322 if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRDR))
323 delayed_load_register = insn.fields.f_dr;
324 else if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_USES_FRDRRR))
325 delayed_load_register = insn.fields.f_drrr;
391 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
396 md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
468 const CGEN_INSN *insn = NULL;
473 md_cgen_lookup_reloc (insn, operand, fixP);
