Lines Matching refs:RS2
483 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", 0, 0, 0, v6 }, /* sta d,[rs1+%g0] */
490 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0), "g,[1]A", 0, 0, 0, v9 }, /* sta d,[rs1+%g0] */
497 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v9 }, /* sta d,[rs1+%g0] */
503 { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v9 }, /* sta d,[rs1+%g0] */
509 { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v9 }, /* sta d,[rs1+%g0] */
536 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", 0, 0, 0, v6 }, /* stba d,[rs1+%g0] */
543 { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v6 }, /* stba d,[rs1+%g0] */
549 { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v6 }, /* stba d,[rs1+%g0] */
603 { "sttwa", F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0), "d,[1]A", 0, 0, 0, v9 }, /* stda d,[rs1+%g0] */
610 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v6 }, /* stda d,[rs1+%g0] */
616 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|RS2(~0), "H,[1]A", 0, 0, 0, v9 }, /* stda d,[rs1+%g0] */
643 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", 0, 0, 0, v6 }, /* stha ,[rs1+%g0] */
650 { "stsha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v6 }, /* stha ,[rs1+%g0] */
656 { "stuha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS, 0, 0, v6 }, /* stha ,[rs1+%g0] */
677 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0)|RS2(~0), "d,[1]A", 0, 0, 0, v9 }, /* stxa d,[rs1+%g0] */
705 { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0)|RS2(~0), "[1]A,d", 0, 0, 0, v7 }, /* swapa [rs1+%g0],d */
716 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett rs1+rs2 */
865 { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0|RS1_G0|ASI(~0), "2", 0, 0, 0, v6 }, /* orcc %g0, rs2, %g0 */
871 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RS1_G0|ASI(~0), "2,m", F_PREF_ALIAS, 0, 0, v8 }, /* wr %g0,rs2,%asrX */
877 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|RS1_G0|ASI(~0), "2,y", F_PREF_ALIAS, 0, 0, v6 }, /* wr %g0,rs2,%y */
883 { "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|RS1_G0|ASI(~0), "2,p", F_PREF_ALIAS, 0, 0, v6notv9 }, /* wr %g0,rs2,%psr */
889 { "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|RS1_G0|ASI(~0), "2,w", F_PREF_ALIAS, 0, 0, v6notv9 }, /* wr %g0,rs2,%wim */
895 { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|RS1_G0|ASI(~0), "2,t", F_PREF_ALIAS, 0, 0, v6notv9 }, /* wr %g0,rs2,%tbr */
982 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RS1_G0|ASI(~0), "2,m", F_ALIAS, 0, 0, v8 }, /* wr %g0,rs2,%asrX */
984 { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|RS1_G0|ASI(~0), "2,y", F_ALIAS, 0, 0, v6 }, /* wr %g0,rs2,%y */
986 { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|RS1_G0|ASI(~0), "2,p", F_ALIAS, 0, 0, v6notv9 }, /* wr %g0,rs2,%psr */
988 { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|RS1_G0|ASI(~0), "2,w", F_ALIAS, 0, 0, v6notv9 }, /* wr %g0,rs2,%wim */
990 { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|RS1_G0|ASI(~0), "2,t", F_ALIAS, 0, 0, v6notv9 }, /* wr %g0,rs2,%tbr */
993 { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0|ASI(~0), "2,d", 0, 0, 0, v6 }, /* or %g0,rs2,d */
1002 { "bset", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "2,r", F_ALIAS, 0, 0, v6 }, /* or rd,rs2,rd */
1013 { "bclr", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "2,r", F_ALIAS, 0, 0, v6 }, /* andn rd,rs2,rd */
1016 { "cmp", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|RD_G0|ASI(~0), "1,2", 0, 0, 0, v6 }, /* subcc rs1,rs2,%g0 */
1052 { "btst", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|RD_G0|ASI(~0), "1,2", F_ALIAS, 0, 0, v6 }, /* andcc rs1,rs2,%g0 */
1055 { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0|ASI(~0), "2,d", F_ALIAS, 0, 0, v6 }, /* sub %g0,rs2,rd */
1114 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI(~0), "1+2", F_JSR|F_DELAYED, 0, 0, v6 }, /* jmpl rs1+rs2,%o7 */
1156 { opcode, (mask)|(2<<11), IMMED|(lose), "Z,1+2", (flags), 0, 0, v9 }, /* rs1 + rs2 */ \
1160 { opcode, (mask), IMMED|(lose), "z,1+2", (flags)|F_ALIAS, 0, 0, v9 }, /* rs1 + rs2 */ \
1165 { opcode, (mask), IMMED|(lose), "1+2", (flags), 0, 0, v6 }, /* rs1 + rs2 */ \
1536 { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, 0, 0, v6 }, /* jmpl rs1+rs2,%g0 */
1585 { "btog", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "2,r", F_ALIAS, 0, 0, v6 }, /* xor rd,rs2,rd */
1751 /* The manual isn't completely accurate on these insns. The `rs2' field is
1753 assumed that it is intended that bit 5 is 0 when rs2 contains a reg. */
1755 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0), "U,d", 0, 0, 0, sparclet },
1756 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0), "1,u", 0, 0, 0, sparclet },
1761 { "cpull", F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d", 0, 0, 0, sparclet },
1804 { "cas", F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, 0, 0, v9 }, /* casa [rs1]ASI_P,rs2,rd */
1805 { "casl", F3(3, 0x3c, 0)|ASI(0x88), F3(~3, ~0x3c, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, 0, 0, v9 }, /* casa [rs1]ASI_P_L,rs2,rd */
1806 { "casx", F3(3, 0x3e, 0)|ASI(0x80), F3(~3, ~0x3e, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, 0, 0, v9 }, /* casxa [rs1]ASI_P,rs2,rd */
1807 { "casxl", F3(3, 0x3e, 0)|ASI(0x88), F3(~3, ~0x3e, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, 0, 0, v9 }, /* casxa [rs1]ASI_P_L,rs2,rd */
1942 { "siam", F3F(2, 0x36, 0x081), F3F(~2, ~0x36, ~0x081)|RD_G0|RS1_G0|RS2(~7), "3", 0, HWCAP_VIS2, 0, v9b },
