| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.cpp | 103 unsigned FrameReg;
106 FrameReg = Mips::SP;
110 FrameReg = Mips::S0;
114 FrameReg = MI.getOperand(OpNo+2).getReg();
116 FrameReg = Mips::SP;
137 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
143 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
147 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
|
| MipsSERegisterInfo.cpp | 138 unsigned FrameReg;
142 FrameReg = ABI.GetStackPtr();
145 FrameReg = ABI.GetBasePtr();
147 FrameReg = getFrameRegister(MF);
149 FrameReg = ABI.GetStackPtr();
151 FrameReg = getFrameRegister(MF);
190 .addReg(FrameReg)
193 FrameReg = Reg;
207 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAdduOp()), Reg).addReg(FrameReg)
210 FrameReg = Reg
[all...] |
| MipsTargetStreamer.h | 129 unsigned FrameReg;
|
| /external/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.cpp | 177 unsigned FrameReg;
179 Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg);
191 .addReg(FrameReg).addImm(0).addReg(SrcEvenReg);
192 replaceFI(MF, II, *StMI, dl, 0, Offset, FrameReg);
203 .addReg(FrameReg).addImm(0);
204 replaceFI(MF, II, *StMI, dl, 1, Offset, FrameReg);
212 replaceFI(MF, II, MI, dl, FIOperandNum, Offset, FrameReg);
|
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 64 unsigned Reg, unsigned FrameReg, int Offset ) {
72 .addReg(FrameReg)
79 .addReg(FrameReg)
85 .addReg(FrameReg)
95 unsigned Reg, unsigned FrameReg,
108 .addReg(FrameReg)
115 .addReg(FrameReg)
121 .addReg(FrameReg)
289 unsigned FrameReg = getFrameRegister(MF);
293 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/)
[all...] |
| /external/llvm/lib/CodeGen/ |
| GCRootLowering.cpp | 323 unsigned FrameReg; // FIXME: surely GCRoot ought to store the
325 RI->StackOffset = TFI->getFrameIndexReference(MF, RI->Num, FrameReg);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64RegisterInfo.cpp | 368 unsigned FrameReg;
374 Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg,
377 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
383 Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg);
384 if (rewriteAArch64FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
395 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII);
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 627 unsigned FrameReg = getFrameRegister(MF);
629 FrameReg = getX86SubSuperRegister(FrameReg, MVT::i32, false);
630 return FrameReg;
|
| X86FastISel.cpp | [all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | 525 unsigned FrameReg = 0;
527 int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
529 DwarfExpr.AddMachineRegIndirect(FrameReg, Offset);
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 692 unsigned FrameReg;
694 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);
701 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
716 Done = rewriteARMFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
719 Done = rewriteT2FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
739 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false);
743 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
747 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 507 unsigned FrameReg = GetFrameRegGeneric(Ctx, Out);
508 if (FrameReg == X86::NoRegister)
509 return FrameReg;
510 return getX86SubSuperRegister(FrameReg, MVT::i32);
540 unsigned FrameReg = GetFrameReg(Ctx, Out);
541 if (MRI && FrameReg != X86::NoRegister) {
543 if (FrameReg == X86::ESP) {
550 MCInstBuilder(X86::MOV32rr).addReg(LocalFrameReg).addReg(FrameReg));
575 unsigned FrameReg = GetFrameReg(Ctx, Out);
576 if (Ctx.getRegisterInfo() && FrameReg != X86::NoRegister)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 678 unsigned FrameReg;
679 int64_t Offset = getFrameIndexReference(MF, F->getFrameIdx(), FrameReg) - 8;
829 int FI, unsigned &FrameReg) const {
897 FrameReg = FP;
899 FrameReg = AP;
901 FrameReg = SP;
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
