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      1 /*
      2  * Copyright (C) 2014 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 
     17 #ifndef ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_
     18 #define ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_
     19 
     20 #include "arch/instruction_set_features.h"
     21 
     22 namespace art {
     23 
     24 // Instruction set features relevant to the MIPS architecture.
     25 class MipsInstructionSetFeatures FINAL : public InstructionSetFeatures {
     26  public:
     27   // Process a CPU variant string like "r4000" and create InstructionSetFeatures.
     28   static const MipsInstructionSetFeatures* FromVariant(const std::string& variant,
     29                                                         std::string* error_msg);
     30 
     31   // Parse a bitmap and create an InstructionSetFeatures.
     32   static const MipsInstructionSetFeatures* FromBitmap(uint32_t bitmap);
     33 
     34   // Turn C pre-processor #defines into the equivalent instruction set features.
     35   static const MipsInstructionSetFeatures* FromCppDefines();
     36 
     37   // Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures.
     38   static const MipsInstructionSetFeatures* FromCpuInfo();
     39 
     40   // Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce
     41   // InstructionSetFeatures.
     42   static const MipsInstructionSetFeatures* FromHwcap();
     43 
     44   // Use assembly tests of the current runtime (ie kRuntimeISA) to determine the
     45   // InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo.
     46   static const MipsInstructionSetFeatures* FromAssembly();
     47 
     48   bool Equals(const InstructionSetFeatures* other) const OVERRIDE;
     49 
     50   InstructionSet GetInstructionSet() const OVERRIDE {
     51     return kMips;
     52   }
     53 
     54   uint32_t AsBitmap() const OVERRIDE;
     55 
     56   std::string GetFeatureString() const OVERRIDE;
     57 
     58   // Is this an ISA revision greater than 2 opening up new opcodes.
     59   bool IsMipsIsaRevGreaterThanEqual2() const {
     60     return mips_isa_gte2_;
     61   }
     62 
     63   // Floating point double registers are encoded differently based on whether the Status.FR bit is
     64   // set. When the FR bit is 0 then the FPU is 32-bit, 1 its 64-bit. Return true if the code should
     65   // be generated assuming Status.FR is 0.
     66   bool Is32BitFloatingPoint() const {
     67     return fpu_32bit_;
     68   }
     69 
     70   bool IsR6() const {
     71     return r6_;
     72   }
     73 
     74   virtual ~MipsInstructionSetFeatures() {}
     75 
     76  protected:
     77   // Parse a vector of the form "fpu32", "mips2" adding these to a new MipsInstructionSetFeatures.
     78   virtual const InstructionSetFeatures*
     79       AddFeaturesFromSplitString(const bool smp, const std::vector<std::string>& features,
     80                                  std::string* error_msg) const OVERRIDE;
     81 
     82  private:
     83   MipsInstructionSetFeatures(bool smp, bool fpu_32bit, bool mips_isa_gte2, bool r6)
     84       : InstructionSetFeatures(smp), fpu_32bit_(fpu_32bit),  mips_isa_gte2_(mips_isa_gte2), r6_(r6)
     85   {}
     86 
     87   // Bitmap positions for encoding features as a bitmap.
     88   enum {
     89     kSmpBitfield = 1,
     90     kFpu32Bitfield = 2,
     91     kIsaRevGte2Bitfield = 4,
     92     kR6 = 8,
     93   };
     94 
     95   const bool fpu_32bit_;
     96   const bool mips_isa_gte2_;
     97   const bool r6_;
     98 
     99   DISALLOW_COPY_AND_ASSIGN(MipsInstructionSetFeatures);
    100 };
    101 
    102 }  // namespace art
    103 
    104 #endif  // ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_
    105