1 // Copyright 2015, ARM Limited 2 // All rights reserved. 3 // 4 // Redistribution and use in source and binary forms, with or without 5 // modification, are permitted provided that the following conditions are met: 6 // 7 // * Redistributions of source code must retain the above copyright notice, 8 // this list of conditions and the following disclaimer. 9 // * Redistributions in binary form must reproduce the above copyright notice, 10 // this list of conditions and the following disclaimer in the documentation 11 // and/or other materials provided with the distribution. 12 // * Neither the name of ARM Limited nor the names of its contributors may be 13 // used to endorse or promote products derived from this software without 14 // specific prior written permission. 15 // 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 #ifndef VIXL_A64_SIMULATOR_CONSTANTS_A64_H_ 28 #define VIXL_A64_SIMULATOR_CONSTANTS_A64_H_ 29 30 namespace vixl { 31 32 // Debug instructions. 33 // 34 // VIXL's macro-assembler and simulator support a few pseudo instructions to 35 // make debugging easier. These pseudo instructions do not exist on real 36 // hardware. 37 // 38 // TODO: Also consider allowing these pseudo-instructions to be disabled in the 39 // simulator, so that users can check that the input is a valid native code. 40 // (This isn't possible in all cases. Printf won't work, for example.) 41 // 42 // Each debug pseudo instruction is represented by a HLT instruction. The HLT 43 // immediate field is used to identify the type of debug pseudo instruction. 44 45 enum DebugHltOpcodes { 46 kUnreachableOpcode = 0xdeb0, 47 kPrintfOpcode, 48 kTraceOpcode, 49 kLogOpcode, 50 // Aliases. 51 kDebugHltFirstOpcode = kUnreachableOpcode, 52 kDebugHltLastOpcode = kLogOpcode 53 }; 54 55 // Each pseudo instruction uses a custom encoding for additional arguments, as 56 // described below. 57 58 // Unreachable - kUnreachableOpcode 59 // 60 // Instruction which should never be executed. This is used as a guard in parts 61 // of the code that should not be reachable, such as in data encoded inline in 62 // the instructions. 63 64 // Printf - kPrintfOpcode 65 // - arg_count: The number of arguments. 66 // - arg_pattern: A set of PrintfArgPattern values, packed into two-bit fields. 67 // 68 // Simulate a call to printf. 69 // 70 // Floating-point and integer arguments are passed in separate sets of registers 71 // in AAPCS64 (even for varargs functions), so it is not possible to determine 72 // the type of each argument without some information about the values that were 73 // passed in. This information could be retrieved from the printf format string, 74 // but the format string is not trivial to parse so we encode the relevant 75 // information with the HLT instruction. 76 // 77 // Also, the following registers are populated (as if for a native A64 call): 78 // x0: The format string 79 // x1-x7: Optional arguments, if type == CPURegister::kRegister 80 // d0-d7: Optional arguments, if type == CPURegister::kFPRegister 81 const unsigned kPrintfArgCountOffset = 1 * kInstructionSize; 82 const unsigned kPrintfArgPatternListOffset = 2 * kInstructionSize; 83 const unsigned kPrintfLength = 3 * kInstructionSize; 84 85 const unsigned kPrintfMaxArgCount = 4; 86 87 // The argument pattern is a set of two-bit-fields, each with one of the 88 // following values: 89 enum PrintfArgPattern { 90 kPrintfArgW = 1, 91 kPrintfArgX = 2, 92 // There is no kPrintfArgS because floats are always converted to doubles in C 93 // varargs calls. 94 kPrintfArgD = 3 95 }; 96 static const unsigned kPrintfArgPatternBits = 2; 97 98 // Trace - kTraceOpcode 99 // - parameter: TraceParameter stored as a uint32_t 100 // - command: TraceCommand stored as a uint32_t 101 // 102 // Allow for trace management in the generated code. This enables or disables 103 // automatic tracing of the specified information for every simulated 104 // instruction. 105 const unsigned kTraceParamsOffset = 1 * kInstructionSize; 106 const unsigned kTraceCommandOffset = 2 * kInstructionSize; 107 const unsigned kTraceLength = 3 * kInstructionSize; 108 109 // Trace parameters. 110 enum TraceParameters { 111 LOG_DISASM = 1 << 0, // Log disassembly. 112 LOG_REGS = 1 << 1, // Log general purpose registers. 113 LOG_VREGS = 1 << 2, // Log NEON and floating-point registers. 114 LOG_SYSREGS = 1 << 3, // Log the flags and system registers. 115 LOG_WRITE = 1 << 4, // Log writes to memory. 116 117 LOG_NONE = 0, 118 LOG_STATE = LOG_REGS | LOG_VREGS | LOG_SYSREGS, 119 LOG_ALL = LOG_DISASM | LOG_STATE | LOG_WRITE 120 }; 121 122 // Trace commands. 123 enum TraceCommand { 124 TRACE_ENABLE = 1, 125 TRACE_DISABLE = 2 126 }; 127 128 // Log - kLogOpcode 129 // - parameter: TraceParameter stored as a uint32_t 130 // 131 // Print the specified information once. This mechanism is separate from Trace. 132 // In particular, _all_ of the specified registers are printed, rather than just 133 // the registers that the instruction writes. 134 // 135 // Any combination of the TraceParameters values can be used, except that 136 // LOG_DISASM is not supported for Log. 137 const unsigned kLogParamsOffset = 1 * kInstructionSize; 138 const unsigned kLogLength = 2 * kInstructionSize; 139 } // namespace vixl 140 141 #endif // VIXL_A64_SIMULATOR_CONSTANTS_A64_H_ 142
