/external/valgrind/none/tests/mips64/ |
logical_instructions.c | 6 AND=0, ANDI, LUI, NOR, 40 case LUI: 44 TEST6("lui $t0, 0xffff", 0xffff, t0); 45 TEST6("lui $a0, 0x0", 0x0, a0); 46 TEST6("lui $t9, 0xff", 0xff, t9); 47 TEST6("lui $v0, 0xfff", 0xfff, v0); 48 TEST6("lui $s0, 0x2", 0x2, s0);
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/toolchain/binutils/binutils-2.25/opcodes/ |
tic80-opc.c | 373 #define LUI (LSI + 1) 380 #define LUBF (LUI + 1) 715 {"cmnd", OP_LI(0x305), MASK_LI, 0, {LUI} }, 772 {"etrap", OP_LI(0x303) | E(1), MASK_LI | E(1), 0, {LUI} }, 818 {"fmpy.uuu", OP_LI(0x3E5) | PD(3) | P2(3) | P1(3), MASK_LI | PD(3) | P2(3) | P1(3), 0, {LUI, REG_22, REG_DEST} }, [all...] |
/system/core/libpixelflinger/codeflinger/ |
MIPS64Assembler.cpp | 374 mMips->LUI(tmpReg, (amode.value >> 16)); 500 mMips->LUI(Rd, (amode.value >> 16)); 527 mMips->LUI(Rd, (amode.value >> 16)); [all...] |
MIPSAssembler.cpp | 385 mMips->LUI(tmpReg, (amode.value >> 16)); 499 mMips->LUI(Rd, (amode.value >> 16)); 531 mMips->LUI(Rd, (amode.value >> 16)); [all...] |
/external/pcre/dist/sljit/ |
sljitNativeMIPS_common.c | 145 #define LUI (HI(15)) [all...] |