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      1 /******************************************************************************
      2  *
      3  * Copyright (C) 2015 The Android Open Source Project
      4  *
      5  * Licensed under the Apache License, Version 2.0 (the "License");
      6  * you may not use this file except in compliance with the License.
      7  * You may obtain a copy of the License at:
      8  *
      9  * http://www.apache.org/licenses/LICENSE-2.0
     10  *
     11  * Unless required by applicable law or agreed to in writing, software
     12  * distributed under the License is distributed on an "AS IS" BASIS,
     13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     14  * See the License for the specific language governing permissions and
     15  * limitations under the License.
     16  *
     17  *****************************************************************************
     18  * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
     19 */
     20 /**
     21 *******************************************************************************
     22 * @file
     23 *  ih264e_defs.h
     24 *
     25 * @brief
     26 *  Definitions used in the encoder
     27 *
     28 * @author
     29 *  ittiam
     30 *
     31 * @remarks
     32 *  None
     33 *
     34 *******************************************************************************
     35 */
     36 
     37 #ifndef IH264E_DEFS_H_
     38 #define IH264E_DEFS_H_
     39 
     40 
     41 #define PARSE_COEFF_DATA_BLOCK_4x4(pv_mb_coeff_data, ps_mb_coeff_data, u4_nnz, u4_sig_coeff_map, pi2_res_block)   \
     42 {                                                                          \
     43     ps_mb_coeff_data = pv_mb_coeff_data;                                   \
     44     u4_nnz = ps_mb_coeff_data->i4_sig_map_nnz & 0xff;                      \
     45     if (u4_nnz)                                                            \
     46     {                                                                      \
     47         u4_sig_coeff_map = ps_mb_coeff_data->i4_sig_map_nnz >> 16;         \
     48         pi2_res_block = ps_mb_coeff_data->ai2_residue;                     \
     49         pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue + ALIGN2(u4_nnz); \
     50     }                                                                      \
     51     else                                                                   \
     52     {                                                                      \
     53       pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue;                    \
     54     }                                                                      \
     55 }
     56 
     57 /*****************************************************************************/
     58 /* Width and height restrictions                                             */
     59 /*****************************************************************************/
     60 /**
     61  * Minimum width supported by codec
     62  */
     63 #define MIN_WD   16
     64 
     65 /**
     66  * Maximum width supported by codec
     67  */
     68 
     69 #define MAX_WD   1920
     70 
     71 /**
     72  * Minimum height supported by codec
     73  */
     74 #define MIN_HT   16
     75 
     76 /**
     77  * Maximum height supported by codec
     78  */
     79 
     80 #define MAX_HT   1920
     81 
     82 /*****************************************************************************/
     83 /* Padding sizes                                                             */
     84 /*****************************************************************************/
     85 /**
     86  * Padding used for top of the frame
     87  */
     88 #define PAD_TOP     32
     89 
     90 /**
     91  * Padding used for bottom of the frame
     92  */
     93 #define PAD_BOT     32
     94 
     95 /**
     96  * Padding used at left of the frame
     97  */
     98 #define PAD_LEFT    32
     99 
    100 /**
    101  * Padding used at right of the frame
    102  */
    103 #define PAD_RIGHT   32
    104 /**
    105  * Padding for width
    106  */
    107 #define PAD_WD      (PAD_LEFT + PAD_RIGHT)
    108 /**
    109  * Padding for height
    110  */
    111 #define PAD_HT      (PAD_TOP  + PAD_BOT)
    112 
    113 /*
    114  * buffer width and height for half pel buffers
    115  */
    116 #define HP_BUFF_WD  24
    117 #define HP_BUFF_HT  18
    118 
    119 /*****************************************************************************/
    120 /* Number of frame restrictions                                              */
    121 /*****************************************************************************/
    122 /**
    123  *  Maximum number of reference pictures
    124  */
    125 #define MAX_REF_PIC_CNT  2
    126 
    127 /**
    128  *  Minimum number of reference pictures
    129  */
    130 #define MIN_REF_PIC_CNT  1
    131 
    132 /**
    133  *  Maximum number of B pictures between two I/P pictures
    134  */
    135 #define MAX_NUM_BFRAMES     10
    136 
    137 /**
    138  *  Maximum number of reference buffers in DPB manager
    139  */
    140 #define MAX_REF_CNT  32
    141 
    142 /*****************************************************************************/
    143 /* Minimum size of inter prediction unit supported by encoder                */
    144 /*****************************************************************************/
    145 #define ENC_MIN_PU_SIZE     16
    146 
    147 /*****************************************************************************/
    148 /* Num cores releated defs                                                   */
    149 /*****************************************************************************/
    150 /**
    151  *  Maximum number of cores
    152  */
    153 #define MAX_NUM_CORES       8
    154 
    155 /**
    156  *  Maximum number of threads for pixel processing
    157  */
    158 #define MAX_PROCESS_THREADS MAX_NUM_CORES
    159 
    160 /**
    161  * Maximum process context sets
    162  * Used to stagger encoding of MAX_CTXT_SETS in parallel
    163  */
    164 #define MAX_CTXT_SETS   1
    165 /**
    166  * Maximum number of contexts
    167  * Kept as twice the number of threads, to make it easier to initialize the contexts
    168  * from master thread
    169  */
    170 #define MAX_PROCESS_CTXT    MAX_NUM_CORES * MAX_CTXT_SETS
    171 
    172 /*****************************************************************************/
    173 /* Profile and level restrictions                                            */
    174 /*****************************************************************************/
    175 /**
    176  * Max level supported by the codec
    177  */
    178 #define MAX_LEVEL  IH264_LEVEL_51
    179 
    180 /**
    181  * Min level supported by the codec
    182  */
    183 #define MIN_LEVEL  IH264_LEVEL_10
    184 
    185 /**
    186  * Maximum number of slice headers that are held in memory simultaneously
    187  * For single core implementation only 1 slice header is enough.
    188  * But for multi-core parsing thread needs to ensure that slice headers are
    189  * stored till the last CB in a slice is decoded.
    190  * Parsing thread has to wait till last CB of a slice is consumed before reusing
    191  * overwriting the slice header
    192  * MAX_SLICE_HDR_CNT is assumed to be a power of 2
    193  */
    194 
    195 #define LOG2_MAX_SLICE_HDR_CNT 8
    196 #define MAX_SLICE_HDR_CNT (1 << LOG2_MAX_SLICE_HDR_CNT)
    197 
    198 /* Generic declarations */
    199 #define DEFAULT_MAX_LEVEL               40
    200 #define DEFAULT_RECON_ENABLE            0
    201 #define DEFAULT_RC                      IVE_RC_STORAGE
    202 #define DEFAULT_MAX_FRAMERATE           120000
    203 #define DEFAULT_MAX_BITRATE             20000000
    204 #define DEFAULT_MAX_NUM_BFRAMES         0
    205 #define DEFAULT_MAX_SRCH_RANGE_X        256
    206 #define DEFAULT_MAX_SRCH_RANGE_Y        256
    207 #define DEFAULT_SLICE_PARAM             256
    208 #define DEFAULT_SRC_FRAME_RATE          30000
    209 #define DEFAULT_TGT_FRAME_RATE          30000
    210 #define DEFAULT_BITRATE                 6000000
    211 #define DEFAULT_QP_MIN                  10
    212 #define DEFAULT_QP_MAX                  51
    213 #define DEFAULT_I_QP                    25
    214 #define DEFAULT_P_QP                    28
    215 #define DEFAULT_B_QP                    28
    216 #define DEFAULT_AIR_MODE                IVE_AIR_MODE_NONE
    217 #define DEFAULT_AIR_REFRESH_PERIOD      30
    218 #define DEFAULT_VBV_DELAY               1000
    219 #define DEFAULT_VBV_SIZE                16800000 /* level 3.1 */
    220 #define DEFAULT_NUM_CORES               1
    221 #define DEFAULT_ME_SPEED_PRESET         100
    222 #define DEFAULT_HPEL                    1
    223 #define DEFAULT_QPEL                    1
    224 #define DEFAULT_I4                      1
    225 #define DEFAULT_I8                      0
    226 #define DEFAULT_I16                     1
    227 #define DEFAULT_ENABLE_FAST_SAD         0
    228 #define DEFAULT_ENABLE_SATQD            1
    229 #define DEFAULT_MIN_SAD_ENABLE          0
    230 #define DEFAULT_MIN_SAD_DISABLE         -1
    231 #define DEFAULT_SRCH_RNG_X              64
    232 #define DEFAULT_SRCH_RNG_Y              48
    233 #define DEFAULT_I_INTERVAL              30
    234 #define DEFAULT_IDR_INTERVAL            1000
    235 #define DEFAULT_B_FRAMES                0
    236 #define DEFAULT_DISABLE_DEBLK_LEVEL     0
    237 #define DEFAULT_PROFILE                 IV_PROFILE_BASE
    238 #define DEFAULT_MIN_INTRA_FRAME_RATE    1
    239 #define DEFAULT_MAX_INTRA_FRAME_RATE    2147483647
    240 #define DEFAULT_MIN_BUFFER_DELAY        30
    241 #define DEFAULT_MAX_BUFFER_DELAY        20000
    242 #define DEFAULT_STRIDE                  0
    243 #define DEFAULT_ENC_SPEED_PRESET        IVE_USER_DEFINED
    244 #define DEFAULT_PRE_ENC_ME              0
    245 #define DEFAULT_PRE_ENC_IPE             0
    246 #define DEFAULT_ENTROPY_CODING_MODE     0
    247 
    248 /** Maximum number of entries in input buffer list */
    249 #define MAX_INP_BUF_LIST_ENTRIES         32
    250 
    251 /** Maximum number of entries in output buffer list */
    252 #define MAX_OUT_BUF_LIST_ENTRIES         32
    253 
    254 /** Maximum number of entries in recon buffer list used within the encoder */
    255 #define MAX_REC_LIST_ENTRIES             16
    256 
    257 /** Number of buffers created to hold half-pel planes for every reference buffer */
    258 #define HPEL_PLANES_CNT                 1
    259 
    260 /** Number of buffers Needed for SUBPEL and BIPRED computation */
    261 #define SUBPEL_BUFF_CNT                 4
    262 
    263 /**
    264  *****************************************************************************
    265  * Macro to compute total size required to hold on set of scaling matrices
    266  *****************************************************************************
    267  */
    268 #define SCALING_MAT_SIZE(m_scaling_mat_size)                                 \
    269 {                                                                            \
    270     m_scaling_mat_size = 6 * TRANS_SIZE_4 * TRANS_SIZE_4;                    \
    271     m_scaling_mat_size += 6 * TRANS_SIZE_8 * TRANS_SIZE_8;                   \
    272     m_scaling_mat_size += 6 * TRANS_SIZE_16 * TRANS_SIZE_16;                 \
    273     m_scaling_mat_size += 2 * TRANS_SIZE_32 * TRANS_SIZE_32;                 \
    274 }
    275 
    276 /**
    277  ******************************************************************************
    278  *  @brief Macros to get raster scan position of a block[8x8] / sub block[4x4]
    279  ******************************************************************************
    280  */
    281 #define GET_BLK_RASTER_POS_X(x)     ((x & 0x01))
    282 #define GET_BLK_RASTER_POS_Y(y)     ((y >> 1))
    283 #define GET_SUB_BLK_RASTER_POS_X(x) ((x & 0x01))
    284 #define GET_SUB_BLK_RASTER_POS_Y(y) ((y >> 1))
    285 
    286 #define NUM_RC_MEMTABS 17
    287 
    288 /**
    289  ***************************************************************************
    290  * Enum to hold various mem records being request
    291  ****************************************************************************
    292  */
    293 enum
    294 {
    295     /**
    296      * Codec Object at API level
    297      */
    298     MEM_REC_IV_OBJ,
    299 
    300     /**
    301      * Codec context
    302      */
    303     MEM_REC_CODEC,
    304 
    305     /**
    306      * Cabac context
    307      */
    308     MEM_REC_CABAC,
    309 
    310     /**
    311      * Cabac context_mb_info
    312      */
    313     MEM_REC_CABAC_MB_INFO,
    314 
    315     /**
    316      * entropy context
    317      */
    318     MEM_REC_ENTROPY,
    319 
    320     /**
    321      * Buffer to hold coeff data
    322      */
    323     MEM_REC_MB_COEFF_DATA,
    324 
    325     /**
    326      * Buffer to hold coeff data
    327      */
    328     MEM_REC_MB_HEADER_DATA,
    329 
    330     /**
    331      * Motion vector bank
    332      */
    333     MEM_REC_MVBANK,
    334 
    335     /**
    336      * Motion vector bits
    337      */
    338     MEM_REC_MVBITS,
    339 
    340     /**
    341      * Holds mem records passed to the codec.
    342      */
    343     MEM_REC_BACKUP,
    344 
    345     /**
    346      * Holds SPS
    347      */
    348     MEM_REC_SPS,
    349 
    350     /**
    351      * Holds PPS
    352      */
    353     MEM_REC_PPS,
    354 
    355     /**
    356      * Holds Slice Headers
    357      */
    358     MEM_REC_SLICE_HDR,
    359 
    360     /**
    361      * Contains map indicating slice index per MB basis
    362      */
    363     MEM_REC_SLICE_MAP,
    364 
    365     /**
    366      * Holds thread handles
    367      */
    368     MEM_REC_THREAD_HANDLE,
    369 
    370     /**
    371      * Holds control call mutex
    372      */
    373     MEM_REC_CTL_MUTEX,
    374 
    375     /**
    376      * Holds entropy call mutex
    377      */
    378     MEM_REC_ENTROPY_MUTEX,
    379 
    380     /**
    381      * Holds memory for Process JOB Queue
    382      */
    383     MEM_REC_PROC_JOBQ,
    384 
    385     /**
    386      * Holds memory for Entropy JOB Queue
    387      */
    388     MEM_REC_ENTROPY_JOBQ,
    389 
    390     /**
    391      * Contains status map indicating processing status per MB basis
    392      */
    393     MEM_REC_PROC_MAP,
    394 
    395     /**
    396      * Contains status map indicating deblocking status per MB basis
    397      */
    398     MEM_REC_DBLK_MAP,
    399 
    400     /*
    401      * Contains AIR map and mask
    402      */
    403     MEM_REC_AIR_MAP,
    404 
    405     /**
    406      * Contains status map indicating ME status per MB basis
    407      */
    408     MEM_REC_ME_MAP,
    409 
    410     /**
    411      * Holds dpb manager context
    412      */
    413     MEM_REC_DPB_MGR,
    414 
    415     /**
    416      * Holds intermediate buffers needed during processing stage
    417      * Memory for process contexts is allocated in this memtab
    418      */
    419     MEM_REC_PROC_SCRATCH,
    420 
    421     /**
    422      * Holds buffers for vert_bs, horz_bs and QP (all frame level)
    423      */
    424     MEM_REC_QUANT_PARAM,
    425 
    426     /**
    427      * Holds top row syntax information
    428      */
    429     MEM_REC_TOP_ROW_SYN_INFO,
    430 
    431     /**
    432      * Holds buffers for vert_bs, horz_bs and QP (all frame level)
    433      */
    434     MEM_REC_BS_QP,
    435 
    436     /**
    437      * Holds input buffer manager context
    438      */
    439     MEM_REC_INP_PIC,
    440 
    441     /**
    442      * Holds output buffer manager context
    443      */
    444     MEM_REC_OUT,
    445 
    446     /**
    447      * Holds picture buffer manager context and array of pic_buf_ts
    448      * Also holds reference picture buffers in non-shared mode
    449      */
    450     MEM_REC_REF_PIC,
    451 
    452     /*
    453      * Mem record for color space conversion
    454      */
    455     MEM_REC_CSC,
    456 
    457     /**
    458      * NMB info struct
    459      */
    460     MEM_REC_MB_INFO_NMB,
    461 
    462     /**
    463      * Rate control of memory records.
    464      */
    465     MEM_REC_RC,
    466 
    467     /**
    468      * Place holder to compute number of memory records.
    469      */
    470     MEM_REC_CNT = MEM_REC_RC + NUM_RC_MEMTABS,
    471 
    472     /*
    473      * Do not add anything below
    474      */
    475 };
    476 
    477 #define DISABLE_DEBLOCK_INTERVAL 8
    478 
    479 /**
    480  ****************************************************************************
    481  * Disable deblock levels
    482  * Level 0 enables deblocking completely and level 4 disables completely
    483  * Other levels are intermediate values to control deblocking level
    484  ****************************************************************************
    485  */
    486 enum
    487 {
    488     /**
    489      * Enable deblocking completely
    490      */
    491     DISABLE_DEBLK_LEVEL_0,
    492 
    493     /**
    494      * Disable only within MB edges - Not supported currently
    495      */
    496     DISABLE_DEBLK_LEVEL_1,
    497 
    498     /**
    499      * Enable deblocking once in DEBLOCK_INTERVAL number of pictures
    500      * and for I slices
    501      */
    502     DISABLE_DEBLK_LEVEL_2,
    503 
    504     /**
    505      * Enable deblocking only for I slices
    506      */
    507     DISABLE_DEBLK_LEVEL_3,
    508 
    509     /**
    510      * Disable deblocking completely
    511      */
    512     DISABLE_DEBLK_LEVEL_4
    513 };
    514 
    515 /**
    516  ****************************************************************************
    517  * Number of buffers for I/O based on format
    518  ****************************************************************************
    519  */
    520 
    521 /** Minimum number of input buffers */
    522 #define MIN_INP_BUFS                 2
    523 
    524 /** Minimum number of output buffers */
    525 #define MIN_OUT_BUFS                1
    526 
    527 /** Minimum number of components in bitstream buffer */
    528 #define MIN_BITS_BUFS_COMP           1
    529 
    530 /** Minimum number of components in raw buffer */
    531 #define MIN_RAW_BUFS_420_COMP        3
    532 #define MIN_RAW_BUFS_422ILE_COMP     1
    533 #define MIN_RAW_BUFS_RGB565_COMP     1
    534 #define MIN_RAW_BUFS_RGBA8888_COMP   1
    535 #define MIN_RAW_BUFS_420SP_COMP      2
    536 
    537 /** Maximum number of active config paramter sets */
    538 #define MAX_ACTIVE_CONFIG_PARAMS 32
    539 
    540 /**
    541 ******************************************************************************
    542  *  @brief Thresholds for luma & chroma to determine if the 8x8 subblock needs
    543  *  to be encoded or skipped
    544 ******************************************************************************
    545 */
    546 #define LUMA_SUB_BLOCK_SKIP_THRESHOLD 4
    547 #define LUMA_BLOCK_SKIP_THRESHOLD 5
    548 #define CHROMA_BLOCK_SKIP_THRESHOLD 4
    549 
    550 /**
    551 ******************************************************************************
    552  *  @brief      defines the first byte of a NAL unit
    553  *  forbidden zero bit - nal_ref_idc - nal_unit_type
    554 ******************************************************************************
    555 */
    556 /* [0 - 11 - 00111] */
    557 #define NAL_SPS_FIRST_BYTE 0x67
    558 
    559 /* [0 - 11 - 01000] */
    560 #define NAL_PPS_FIRST_BYTE 0x68
    561 
    562 /* [0 - 11 - 00001] */
    563 #define NAL_SLICE_FIRST_BYTE 0x61
    564 
    565 /* [0 - 00 - 00001] */
    566 #define NAL_NON_REF_SLICE_FIRST_BYTE 0x01
    567 
    568 /* [0 - 11 - 00101] */
    569 #define NAL_IDR_SLICE_FIRST_BYTE 0x65
    570 
    571 /* [0 - 00 - 01100] */
    572 #define NAL_FILLER_FIRST_BYTE 0x0C
    573 
    574 /* [0 - 00 - 00110] */
    575 #define NAL_SEI_FIRST_BYTE 0x06
    576 
    577 #define H264_ALLOC_INTER_FRM_INTV        2
    578 
    579 #define H264_MPEG_QP_MAP    255
    580 
    581 #define MPEG2_QP_ELEM       (H264_MPEG_QP_MAP + 1)
    582 #define H264_QP_ELEM        (MAX_H264_QP + 1)
    583 
    584 #define H264_INIT_QUANT_I                26
    585 #define H264_INIT_QUANT_P                34
    586 
    587 #endif /*IH264E_DEFS_H_*/
    588