| /external/llvm/lib/CodeGen/ |
| SlotIndexes.cpp | 177 MachineBasicBlock::iterator MBBI = End;
179 while (ListI != ListB || MBBI != Begin || (includeStart && !pastStart)) {
185 MachineInstr *MI = (MBBI != MBB->end() && !pastStart) ? MBBI : nullptr;
186 bool MBBIAtBegin = MBBI == Begin && (!includeStart || pastStart);
190 if (MBBI != Begin)
191 --MBBI;
195 if (MBBI != Begin)
196 --MBBI;
|
| Analysis.cpp | 706 MachineBasicBlock::const_iterator MBBI = MBB.getFirstTerminator();
709 if (MBBI->getOpcode() != TII->getCatchReturnOpcode())
714 const MachineBasicBlock *Successor = MBBI->getOperand(0).getMBB();
715 const MachineBasicBlock *SuccessorColor = MBBI->getOperand(1).getMBB();
|
| MachineFunction.cpp | 168 MachineFunction::iterator MBBI, E = end();
170 MBBI = begin();
172 MBBI = MBB->getIterator();
176 if (MBBI != begin())
177 BlockNo = std::prev(MBBI)->getNumber() + 1;
179 for (; MBBI != E; ++MBBI, ++BlockNo) {
180 if (MBBI->getNumber() != (int)BlockNo) {
182 if (MBBI->getNumber() != -1) {
183 assert(MBBNumbering[MBBI->getNumber()] == &*MBBI &
[all...] |
| SplitKit.cpp | 634 MachineBasicBlock::iterator MBBI(MI);
636 do AtBegin = MBBI == MBB->begin();
637 while (!AtBegin && (--MBBI)->isDebugValue());
653 if (AtBegin || !MBBI->readsVirtualRegister(Edit->getReg())) {
657 SlotIndex Kill = LIS.getInstructionIndex(MBBI).getRegSlot();
658 DEBUG(dbgs() << " move kill to " << Kill << '\t' << *MBBI);
[all...] |
| BranchFolding.cpp | 435 MachineFunction::iterator MBBI = CurMBB.getIterator();
437 CurMBB.getParent()->insert(++MBBI, NewMBB);
773 MachineBasicBlock::reverse_iterator MBBI = MBB->rbegin();
779 assert(MBBI != MBBIE && "Reached BB end within common tail length!");
782 if (MBBI->isDebugValue()) {
783 ++MBBI;
792 assert(MBBICommon->isIdenticalTo(&*MBBI) && "Expected matching MIIs!");
795 if (!hasIdenticalMMOs(&*MBBI, &*MBBICommon))
798 ++MBBI;
[all...] |
| MachineVerifier.cpp | 325 for (MachineBasicBlock::const_instr_iterator MBBI = MFI->instr_begin(),
326 MBBE = MFI->instr_end(); MBBI != MBBE; ++MBBI) {
327 if (MBBI->getParent() != &*MFI) {
329 errs() << "Instruction: " << *MBBI;
334 if (InBundle && !MBBI->isBundledWithPred())
337 &*MBBI);
338 if (!InBundle && MBBI->isBundledWithPred())
341 &*MBBI);
344 if (!MBBI->isInsideBundle())
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2InstrInfo.cpp | 62 MachineBasicBlock::iterator MBBI = Tail;
65 --MBBI;
74 while (Count && MBBI != E) {
75 if (MBBI->isDebugValue()) {
76 --MBBI;
79 if (MBBI->getOpcode() == ARM::t2IT) {
80 unsigned Mask = MBBI->getOperand(1).getImm();
82 MBBI->eraseFromParent();
86 MBBI->getOperand(1).setImm((Mask & MaskOff) | MaskOn);
90 --MBBI;
[all...] |
| Thumb1FrameLowering.cpp | 43 MachineBasicBlock::iterator &MBBI,
47 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
88 MachineBasicBlock::iterator MBBI = MBB.begin();
122 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize,
127 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
134 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -(NumBytes - ArgRegsSaveSize),
139 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
173 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
174 ++MBBI;
[all...] |
| Thumb2ITBlockPass.cpp | 180 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
181 while (MBBI != E) {
182 MachineInstr *MI = &*MBBI;
187 ++MBBI;
196 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
205 ++MBBI;
216 for (; MBBI != E && Pos &&
217 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) {
218 if (MBBI->isDebugValue())
221 MachineInstr *NMI = &*MBBI;
[all...] |
| ARMExpandPseudoInsts.cpp | 61 MachineBasicBlock::iterator MBBI);
63 void ExpandVLD(MachineBasicBlock::iterator &MBBI);
64 void ExpandVST(MachineBasicBlock::iterator &MBBI);
65 void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
66 void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
69 MachineBasicBlock::iterator &MBBI);
377 void ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) {
378 MachineInstr &MI = *MBBI;
386 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
442 void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16FrameLowering.cpp | 41 MachineBasicBlock::iterator MBBI = MBB.begin();
57 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
62 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
77 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
82 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
89 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
93 DebugLoc dl = MBBI->getDebugLoc();
100 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
105 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
|
| MipsOptimizePICCall.cpp | 75 bool visitNode(MBBInfo &MBBI);
187 MBBInfo &MBBI = WorkList.back();
191 if (MBBI.isVisited()) {
192 MBBI.postVisit();
198 MBBI.preVisit(ScopedHT);
199 Changed |= visitNode(MBBI);
200 const MachineDomTreeNode *Node = MBBI.getNode();
208 bool OptimizePICCall::visitNode(MBBInfo &MBBI) {
210 MachineBasicBlock *MBB = MBBI.getNode()->getBlock();
|
| MipsSEFrameLowering.cpp | 387 MachineBasicBlock::iterator MBBI = MBB.begin();
411 TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
416 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
428 ++MBBI;
450 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
455 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
466 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
471 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
477 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
488 TII.storeRegToStackSlot(MBB, MBBI, ABI.GetEhDataReg(I), false
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| RegisterScavenging.h | 36 MachineBasicBlock::iterator MBBI;
60 /// The current state of each reg unit immediately before MBBI.
84 while (MBBI != I) forward();
93 while (MBBI != I) unprocess();
100 MBBI = I;
103 MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
145 return scavengeRegister(RegClass, MBBI, SPAdj);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.cpp | 50 MachineBasicBlock::iterator MBBI = MBB.begin();
51 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
68 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
72 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FP)
84 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
85 ++MBBI;
87 if (MBBI != MBB.end())
88 DL = MBBI->getDebugLoc()
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcFrameLowering.cpp | 42 MachineBasicBlock::iterator MBBI,
52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
64 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
66 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
77 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
79 BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1)
81 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
95 MachineBasicBlock::iterator MBBI = MBB.begin();
155 emitSPAdjustment(MF, MBB, MBBI, -NumBytes, SAVErr, SAVEri)
[all...] |
| SparcInstrInfo.cpp | 455 MachineBasicBlock::iterator MBBI = FirstMBB.begin();
464 BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg);
|
| /external/llvm/lib/Target/X86/ |
| X86ExpandPseudo.cpp | 56 bool ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
62 /// If \p MBBI is a pseudo instruction, this method expands
64 /// \returns true if \p MBBI has been expanded.
66 MachineBasicBlock::iterator MBBI) {
67 MachineInstr &MI = *MBBI;
69 DebugLoc DL = MBBI->getDebugLoc();
80 MachineOperand &JumpTarget = MBBI->getOperand(0);
81 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);
89 StackAdj += X86FL->mergeSPUpdates(MBB, MBBI, true);
90 X86FL->emitSPUpdate(MBB, MBBI, StackAdj, /*InEpilogue=*/true)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SILoadStoreOptimizer.cpp | 165 MachineBasicBlock::iterator MBBI = I;
166 ++MBBI;
168 if (MBBI->getOpcode() != I->getOpcode())
172 if (MBBI->hasOrderedMemoryRef())
177 const MachineOperand &AddrReg1 = MBBI->getOperand(AddrIdx);
186 unsigned Offset1 = MBBI->getOperand(OffsetIdx).getImm() & 0xffff;
190 return MBBI;
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZElimCompare.cpp | 202 MachineBasicBlock::iterator MBBI = Compare, MBBE = Branch;
203 for (++MBBI; MBBI != MBBE; ++MBBI)
204 if (getRegReferences(MBBI, SrcReg))
304 MachineBasicBlock::iterator MBBI = MI, MBBE = Compare;
305 for (++MBBI; MBBI != MBBE; ++MBBI)
306 MBBI->clearRegisterKills(SystemZ::CC, TRI)
[all...] |
| SystemZFrameLowering.cpp | 127 MachineBasicBlock::iterator MBBI,
178 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
206 TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
216 MachineBasicBlock::iterator MBBI,
226 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
232 TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
248 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
285 // Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
287 MachineBasicBlock::iterator &MBBI,
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 63 MachineBasicBlock::iterator MBBI, DebugLoc dl,
68 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
73 MachineBasicBlock::iterator MBBI, DebugLoc dl,
78 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
83 MachineBasicBlock::iterator MBBI, DebugLoc dl,
88 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
99 MachineBasicBlock::iterator MBBI, DebugLoc dl,
108 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(OpImm);
111 EmitDefCfaOffset(MBB, MBBI, dl, TII, MMI, Adjusted*4);
123 MachineBasicBlock::iterator MBBI, DebugLoc dl
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 205 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
212 DebugLoc DL = MBB.findDebugLoc(MBBI);
247 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
254 static int getFPOffsetInPrologue(MachineInstr *MBBI) {
257 assert(((MBBI->getOpcode() == AArch64::STPXpre ||
258 MBBI->getOpcode() == AArch64::STPDpre) &&
259 MBBI->getOperand(3).getReg() == AArch64::SP &&
260 MBBI->getOperand(4).getImm() < 0 &&
261 (MBBI->getOperand(4).getImm() & 1) == 0));
266 int FPOffset = -(MBBI->getOperand(4).getImm() + 2) * 8
[all...] |
| AArch64LoadStoreOptimizer.cpp | 129 bool tryToMergeLdStInst(MachineBasicBlock::iterator &MBBI);
872 MachineBasicBlock::iterator MBBI = I;
874 ++MBBI;
910 for (unsigned Count = 0; MBBI != E && Count < Limit; ++MBBI) {
911 MachineInstr *MI = MBBI;
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| WinException.cpp | 347 MachineBasicBlock::const_iterator MBBI,
349 : EHInfo(EHInfo), MFI(MFI), MFE(MFE), MBBI(MBBI), BaseState(BaseState) {
377 if (MBBI != O.MBBI)
400 MachineBasicBlock::const_iterator MBBI;
412 MBBI = MFI->begin();
413 for (auto MBBE = MFI->end(); MBBI != MBBE; ++MBBI) {
414 const MachineInstr &MI = *MBBI;
[all...] |
