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Searched
defs:Op5
(Results
1 - 3
of
3
) sorted by null
/external/llvm/lib/Target/Hexagon/
HexagonExpandPredSpillCode.cpp
148
MachineOperand &
Op5
= MI->getOperand(5);
158
NewMI->addOperand(
Op5
);
/external/llvm/lib/Target/XCore/Disassembler/
XCoreDisassembler.cpp
648
unsigned Op1, Op2, Op3, Op4,
Op5
, Op6;
653
S = Decode3OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4,
Op5
, Op6);
660
DecodeGRRegsRegisterClass(Inst,
Op5
, Address, Decoder);
682
unsigned Op1, Op2, Op3, Op4,
Op5
;
687
S = Decode2OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4,
Op5
);
695
DecodeGRRegsRegisterClass(Inst,
Op5
, Address, Decoder);
/external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp
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