| /frameworks/compile/mclinker/lib/Script/ |
| Operand.cpp | 1 //===- Operand.cpp --------------------------------------------------------===//
9 #include "mcld/Script/Operand.h"
22 // Operand
24 Operand::Operand(Type pType) : ExprToken(ExprToken::OPERAND), m_Type(pType) {
27 Operand::~Operand() {
36 SymOperand::SymOperand() : Operand(Operand::SYMBOL), m_Value(0)
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| /external/llvm/lib/Transforms/IPO/ |
| ConstantMerge.cpp | 73 Value *Operand = Inits->getOperand(i)->stripPointerCastsNoFollowAliases();
74 GlobalValue *GV = cast<GlobalValue>(Operand);
|
| /external/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.h | 40 /// The registers operand
41 MachineOperand *Operand;
|
| MIRPrinter.cpp | 70 /// Maps from stack object indices to operand indices which will be used when
515 const auto &Operand = MI.getOperand(I);
516 if (!Operand.isReg() || Operand.isDef())
520 int TiedIdx = Operand.isTied() ? int(MI.findTiedOperandIdx(I)) : -1;
534 assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
639 const FrameIndexOperand &Operand = ObjectInfo->second;
640 if (Operand.IsFixed) {
641 OS << "%fixed-stack." << Operand.ID;
644 OS << "%stack." << Operand.ID
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| /frameworks/compile/mclinker/include/mcld/Script/ |
| Operand.h | 1 //===- Operand.h ----------------------------------------------------------===//
25 /** \class Operand
26 * \brief This class defines the interfaces to an operand token.
29 class Operand : public ExprToken {
34 explicit Operand(Type pType);
35 virtual ~Operand();
45 return pToken->kind() == ExprToken::OPERAND;
53 * \brief This class defines the interfaces to a symbol operand.
56 class SymOperand : public Operand {
73 static bool classof(const Operand* pOperand)
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| /external/llvm/lib/Target/NVPTX/ |
| NVPTXGenericToNVVM.cpp | 117 Value *Operand = II->getOperand(i);
118 if (isa<Constant>(Operand)) {
120 i, remapConstant(&M, &*I, cast<Constant>(Operand), Builder));
173 // See if the address space conversion requires the operand to be bitcast
177 // A bitcast to i8 addrspace(n)* on the operand is needed.
240 // If any operand in the constant expression C is or uses a global variable
259 Value *Operand = C->getOperand(i);
260 Value *NewOperand = remapConstant(M, F, cast<Constant>(Operand), Builder);
261 OperandChanged |= Operand != NewOperand;
295 // Check if any operand is or uses a global variable in GVMap, and thu
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| NVVMReflect.cpp | 150 // ConstantDataSequential operand which can be converted to string and used
158 // In this case, we get a Constant with a GlobalVariable operand and we need
166 "Only one operand expect for _reflect function");
182 const Value *Operand = cast<Constant>(Sym)->getOperand(0);
183 if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(Operand)) {
184 // For CUDA-7.0 style __nvvm_reflect calls we need to find operand's
189 Operand = Initializer;
192 assert(isa<ConstantDataSequential>(Operand) &&
194 assert(cast<ConstantDataSequential>(Operand)->isCString() &&
198 cast<ConstantDataSequential>(Operand)->getAsString()
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| /external/llvm/utils/TableGen/ |
| PseudoLoweringEmitter.cpp | 28 enum MapKind { Operand, Imm, Reg };
31 unsigned Operand; // Operand number mapped to.
95 "Pseudo operand type '" + DI->getDef()->getName() +
96 "' does not match expansion operand type '" +
98 // Source operand maps to destination operand. The Data element
100 // for each corresponding MachineInstr operand, not just the first.
102 OperandMap[BaseIdx + i + I].Kind = OpData::Operand;
110 // a constant value for a complex operand (> 1 MI operand)
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| /dalvik/dx/src/com/android/dx/ssa/ |
| PhiInsn.java | 48 private final ArrayList<Operand> operands = new ArrayList<Operand>();
73 * operand and will be derived later.
95 for (Operand o : operands) {
127 * Adds an operand to this phi instruction.
129 * @param registerSpec register spec, including type and reg of operand
130 * @param predBlock predecessor block to be associated with this operand
134 operands.add(new Operand(registerSpec, predBlock.getIndex(),
142 * Removes all operand uses of a register from this phi instruction.
144 * @param registerSpec register spec, including type and reg of operand
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| /external/clang/lib/Sema/ |
| SemaCoroutine.cpp | 201 Expr *Operand = new (S.Context) OpaqueValueExpr(
205 ExprResult Result = buildMemberCall(S, Operand, Loc, Funcs[I], None);
342 // FIXME: If the operand is a reference to a variable that's about to go out
343 // of scope, we should treat the operand as an xvalue for this overload
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| PhiInsn.java | 44 private final ArrayList<Operand> operands = new ArrayList<Operand>();
69 * operand and will be derived later.
91 for (Operand o : operands) {
123 * Adds an operand to this phi instruction.
125 * @param registerSpec register spec, including type and reg of operand
126 * @param predBlock predecessor block to be associated with this operand
130 operands.add(new Operand(registerSpec, predBlock.getIndex(),
138 * Removes all operand uses of a register from this phi instruction.
140 * @param registerSpec register spec, including type and reg of operand
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| /external/v8/src/arm/ |
| assembler-arm-inl.h | 309 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
316 Operand::Operand(const ExternalReference& f) {
323 Operand::Operand(Smi* value) {
330 Operand::Operand(Register rm) {
338 bool Operand::is_reg() const {
|
| /external/v8/src/mips/ |
| assembler-mips-inl.h | 54 // Operand and MemOperand.
56 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
63 Operand::Operand(const ExternalReference& f) {
70 Operand::Operand(Smi* value) {
77 Operand::Operand(Register rm) {
82 bool Operand::is_reg() const
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| /external/v8/src/mips64/ |
| assembler-mips64-inl.h | 54 // Operand and MemOperand.
56 Operand::Operand(int64_t immediate, RelocInfo::Mode rmode) {
63 Operand::Operand(const ExternalReference& f) {
70 Operand::Operand(Smi* value) {
77 Operand::Operand(Register rm) {
82 bool Operand::is_reg() const
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| /external/v8/src/s390/ |
| assembler-s390-inl.h | 343 // Operand constructors
344 Operand::Operand(intptr_t immediate, RelocInfo::Mode rmode) {
350 Operand::Operand(const ExternalReference& f) {
356 Operand::Operand(Smi* value) {
362 Operand::Operand(Register rm) {
446 bool Operand::is_reg() const { return rm_.is_valid();
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| /art/compiler/utils/x86/ |
| assembler_x86.h | 51 class Operand : public ValueObject {
91 // Operand can be sub classed (e.g: Address).
92 Operand() : length_(0), fixup_(nullptr) { }
131 // A fixup can be associated with the operand, in order to be applied after the
135 explicit Operand(Register reg) : fixup_(nullptr) { SetModRM(3, reg); }
137 // Get the operand encoding byte at the given index.
148 class Address : public Operand {
346 void rorl(Register operand, Register shifter);
348 void roll(Register operand, Register shifter);
550 void shll(Register operand, Register shifter)
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| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 59 class Operand : public ValueObject {
108 // Operand can be sub classed (e.g: Address).
109 Operand() : rex_(0), length_(0), fixup_(nullptr) { }
156 explicit Operand(CpuRegister reg) : rex_(0), length_(0), fixup_(nullptr) { SetModRM(3, reg); }
158 // Get the operand encoding byte at the given index.
169 class Address : public Operand {
592 void shll(CpuRegister operand, CpuRegister shifter);
594 void shrl(CpuRegister operand, CpuRegister shifter);
596 void sarl(CpuRegister operand, CpuRegister shifter);
599 void shlq(CpuRegister operand, CpuRegister shifter)
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| /external/v8/src/ia32/ |
| assembler-ia32-inl.h | 504 void Operand::set_modrm(int mod, Register rm) {
511 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
521 void Operand::set_disp8(int8_t disp) {
527 void Operand::set_dispr(int32_t disp, RelocInfo::Mode rmode) {
535 Operand::Operand(Register reg) {
541 Operand::Operand(XMMRegister xmm_reg) {
547 Operand::Operand(int32_t disp, RelocInfo::Mode rmode)
[all...] |
| /external/v8/src/ppc/ |
| assembler-ppc-inl.h | 377 Operand::Operand(intptr_t immediate, RelocInfo::Mode rmode) {
383 Operand::Operand(const ExternalReference& f) {
389 Operand::Operand(Smi* value) {
395 Operand::Operand(Register rm) {
444 bool Operand::is_reg() const { return rm_.is_valid(); }
|
| /external/v8/src/x87/ |
| assembler-x87-inl.h | 505 void Operand::set_modrm(int mod, Register rm) {
512 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
522 void Operand::set_disp8(int8_t disp) {
528 void Operand::set_dispr(int32_t disp, RelocInfo::Mode rmode) {
536 Operand::Operand(Register reg) {
542 Operand::Operand(int32_t disp, RelocInfo::Mode rmode) {
549 Operand::Operand(Immediate imm)
[all...] |
| /external/clang/include/clang/AST/ |
| StmtCXX.h | 369 /// This initialization is modeled by the evaluation of the operand
371 /// <promise>.return_value(<operand>)
377 enum SubStmt { Operand, PromiseCall, Count };
382 CoreturnStmt(SourceLocation CoreturnLoc, Stmt *Operand, Stmt *PromiseCall)
384 SubStmts[SubStmt::Operand] = Operand;
390 /// \brief Retrieve the operand of the 'co_return' statement. Will be nullptr
392 Expr *getOperand() const { return static_cast<Expr*>(SubStmts[Operand]); }
|
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| SymbolManager.h | 310 const SymExpr *Operand;
311 /// Type of the operand.
318 SymExpr(CastSymbolKind), Operand(In), FromTy(From), ToTy(To) { }
322 const SymExpr *getOperand() const { return Operand; }
335 Profile(ID, Operand, FromTy, ToTy);
523 const SymbolCast* getCastSymbol(const SymExpr *Operand,
|
| /external/llvm/include/llvm/Analysis/ |
| ScalarEvolutionExpressions.h | 137 // Since SCEVs are immutable, ScalarEvolution allocates operand
151 assert(i < NumOperands && "Operand index out of range!");
218 // Use the type of the last operand, which is likely to be a pointer
570 const SCEV *Operand = ((SC*)this)->visit(Expr->getOperand());
571 return SE.getTruncateExpr(Operand, Expr->getType());
575 const SCEV *Operand = ((SC*)this)->visit(Expr->getOperand());
576 return SE.getZeroExtendExpr(Operand, Expr->getType());
580 const SCEV *Operand = ((SC*)this)->visit(Expr->getOperand());
581 return SE.getSignExtendExpr(Operand, Expr->getType());
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCInstrInfo.cpp | 144 llvm_unreachable("invalid extendable operand");
181 // Return constant extended operand number.
223 // Return the max value that a constant extendable operand can have
238 // Return the min value that a constant extendable operand can have
480 // Return whether the operand can be constant extended.
625 MCOperand &Operand = MCI.getOperand(0);
626 Operand.setImm(Operand.getImm() | innerLoopMask);
631 MCOperand &Operand = MCI.getOperand(0);
632 Operand.setImm(Operand.getImm() | memReorderDisabledMask)
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| /external/opencv3/3rdparty/jinja2/ |
| nodes.py | 699 list of :class:`Operand`\s.
716 class Operand(Helper):
721 Operand.__doc__ += '\nThe following operators are available: ' + \
|
