1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements a target parser to recognise hardware features such as 11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_SUPPORT_TARGETPARSER_H 16 #define LLVM_SUPPORT_TARGETPARSER_H 17 18 // FIXME: vector is used because that's what clang uses for subtarget feature 19 // lists, but SmallVector would probably be better 20 #include <vector> 21 22 namespace llvm { 23 class StringRef; 24 25 // Target specific information into their own namespaces. These should be 26 // generated from TableGen because the information is already there, and there 27 // is where new information about targets will be added. 28 // FIXME: To TableGen this we need to make some table generated files available 29 // even if the back-end is not compiled with LLVM, plus we need to create a new 30 // back-end to TableGen to create these clean tables. 31 namespace ARM { 32 33 // FPU names. 34 enum FPUKind { 35 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND, 36 #include "ARMTargetParser.def" 37 FK_LAST 38 }; 39 40 // FPU Version 41 enum FPUVersion { 42 FV_NONE = 0, 43 FV_VFPV2, 44 FV_VFPV3, 45 FV_VFPV3_FP16, 46 FV_VFPV4, 47 FV_VFPV5 48 }; 49 50 // An FPU name implies one of three levels of Neon support: 51 enum NeonSupportLevel { 52 NS_None = 0, ///< No Neon 53 NS_Neon, ///< Neon 54 NS_Crypto ///< Neon with Crypto 55 }; 56 57 // An FPU name restricts the FPU in one of three ways: 58 enum FPURestriction { 59 FR_None = 0, ///< No restriction 60 FR_D16, ///< Only 16 D registers 61 FR_SP_D16 ///< Only single-precision instructions, with 16 D registers 62 }; 63 64 // Arch names. 65 enum ArchKind { 66 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID, 67 #include "ARMTargetParser.def" 68 AK_LAST 69 }; 70 71 // Arch extension modifiers for CPUs. 72 enum ArchExtKind : unsigned { 73 AEK_INVALID = 0x0, 74 AEK_NONE = 0x1, 75 AEK_CRC = 0x2, 76 AEK_CRYPTO = 0x4, 77 AEK_FP = 0x8, 78 AEK_HWDIV = 0x10, 79 AEK_HWDIVARM = 0x20, 80 AEK_MP = 0x40, 81 AEK_SIMD = 0x80, 82 AEK_SEC = 0x100, 83 AEK_VIRT = 0x200, 84 AEK_DSP = 0x400, 85 AEK_FP16 = 0x800, 86 // Unsupported extensions. 87 AEK_OS = 0x8000000, 88 AEK_IWMMXT = 0x10000000, 89 AEK_IWMMXT2 = 0x20000000, 90 AEK_MAVERICK = 0x40000000, 91 AEK_XSCALE = 0x80000000, 92 }; 93 94 // ISA kinds. 95 enum ISAKind { IK_INVALID = 0, IK_ARM, IK_THUMB, IK_AARCH64 }; 96 97 // Endianness 98 // FIXME: BE8 vs. BE32? 99 enum EndianKind { EK_INVALID = 0, EK_LITTLE, EK_BIG }; 100 101 // v6/v7/v8 Profile 102 enum ProfileKind { PK_INVALID = 0, PK_A, PK_R, PK_M }; 103 104 StringRef getCanonicalArchName(StringRef Arch); 105 106 // Information by ID 107 StringRef getFPUName(unsigned FPUKind); 108 unsigned getFPUVersion(unsigned FPUKind); 109 unsigned getFPUNeonSupportLevel(unsigned FPUKind); 110 unsigned getFPURestriction(unsigned FPUKind); 111 112 // FIXME: These should be moved to TargetTuple once it exists 113 bool getFPUFeatures(unsigned FPUKind, std::vector<const char *> &Features); 114 bool getHWDivFeatures(unsigned HWDivKind, std::vector<const char *> &Features); 115 bool getExtensionFeatures(unsigned Extensions, 116 std::vector<const char*> &Features); 117 118 StringRef getArchName(unsigned ArchKind); 119 unsigned getArchAttr(unsigned ArchKind); 120 StringRef getCPUAttr(unsigned ArchKind); 121 StringRef getSubArch(unsigned ArchKind); 122 StringRef getArchExtName(unsigned ArchExtKind); 123 const char *getArchExtFeature(StringRef ArchExt); 124 StringRef getHWDivName(unsigned HWDivKind); 125 126 // Information by Name 127 unsigned getDefaultFPU(StringRef CPU, unsigned ArchKind); 128 unsigned getDefaultExtensions(StringRef CPU, unsigned ArchKind); 129 StringRef getDefaultCPU(StringRef Arch); 130 131 // Parser 132 unsigned parseHWDiv(StringRef HWDiv); 133 unsigned parseFPU(StringRef FPU); 134 unsigned parseArch(StringRef Arch); 135 unsigned parseArchExt(StringRef ArchExt); 136 unsigned parseCPUArch(StringRef CPU); 137 unsigned parseArchISA(StringRef Arch); 138 unsigned parseArchEndian(StringRef Arch); 139 unsigned parseArchProfile(StringRef Arch); 140 unsigned parseArchVersion(StringRef Arch); 141 142 } // namespace ARM 143 } // namespace llvm 144 145 #endif 146
