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Searched
defs:PhysReg
(Results
1 - 11
of
11
) sorted by null
/external/llvm/lib/CodeGen/
LiveRegMatrix.cpp
75
unsigned
PhysReg
, Callable Func) {
77
for (MCRegUnitMaskIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units) {
89
for (MCRegUnitIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units) {
97
void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned
PhysReg
) {
99
<< " to " << PrintReg(
PhysReg
, TRI) << ':');
101
VRM->assignVirt2Phys(VirtReg.reg,
PhysReg
);
103
foreachUnit(TRI, VirtReg,
PhysReg
, [&](unsigned Unit,
115
unsigned
PhysReg
= VRM->getPhys(VirtReg.reg);
117
<< " from " << PrintReg(
PhysReg
, TRI) << ':');
120
foreachUnit(TRI, VirtReg,
PhysReg
, [&](unsigned Unit
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...]
RegisterClassInfo.cpp
99
unsigned
PhysReg
= RawOrder[i];
101
if (Reserved.test(
PhysReg
))
103
unsigned Cost = TRI->getCostPerUse(
PhysReg
);
106
if (CSRNum[
PhysReg
])
107
//
PhysReg
aliases a CSR, save it for later.
108
CSRAlias.push_back(
PhysReg
);
112
RCI.Order[N++] =
PhysReg
;
121
unsigned
PhysReg
= CSRAlias[i];
122
unsigned Cost = TRI->getCostPerUse(
PhysReg
);
125
RCI.Order[N++] =
PhysReg
;
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...]
InterferenceCache.h
39
/// of
PhysReg
in all basic blocks.
41
///
PhysReg
- The register currently represented.
42
unsigned
PhysReg
;
63
/// RegUnitInfo - Information tracked about each RegUnit in
PhysReg
.
86
/// Info for each RegUnit in
PhysReg
. It is very rare ofr a
PHysReg
to have
97
Entry() :
PhysReg
(0), Tag(0), RefCount(0), Indexes(nullptr), LIS(nullptr) {}
101
PhysReg
= 0;
107
unsigned getPhysReg() const { return
PhysReg
; }
115
/// valid - Return true if this is a valid entry for
physReg
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...]
ShrinkWrap.cpp
232
unsigned
PhysReg
= MO.getReg();
233
if (!
PhysReg
)
235
assert(TargetRegisterInfo::isPhysicalRegister(
PhysReg
) &&
237
UseOrDefCSR = RCI.getLastCalleeSavedAlias(
PhysReg
);
VirtRegMap.cpp
170
void addLiveInsForSubRanges(const LiveInterval &LI, unsigned
PhysReg
) const;
242
unsigned
PhysReg
) const {
280
MBB->addLiveIn(
PhysReg
, LaneMask);
295
// assigned
PhysReg
must be marked as live-in to those blocks.
296
unsigned
PhysReg
= VRM->getPhys(VirtReg);
297
assert(
PhysReg
!= VirtRegMap::NO_PHYS_REG && "Unmapped virtual register.");
300
addLiveInsForSubRanges(LI,
PhysReg
);
310
MBB->addLiveIn(
PhysReg
);
316
// Sort and unique MBB LiveIns as we've not checked if SubReg/
PhysReg
were in
372
unsigned
PhysReg
= VRM->getPhys(VirtReg)
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...]
RegAllocFast.cpp
73
unsigned
PhysReg
; // Currently held here.
78
: LastUse(nullptr), VirtReg(v),
PhysReg
(0), LastOpNum(0), Dirty(false){}
123
// Mark a
physreg
as used in this instruction.
124
void markRegUsedInInstr(unsigned
PhysReg
) {
125
for (MCRegUnitIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units)
129
// Check if a
physreg
or any of its aliases are used in this instruction.
130
bool isRegUsedInInstr(unsigned
PhysReg
) const {
131
for (MCRegUnitIterator Units(
PhysReg
, TRI); Units.isValid(); ++Units)
177
void definePhysReg(MachineInstr *MI, unsigned
PhysReg
, RegState NewState);
178
unsigned calcSpillCost(unsigned
PhysReg
) const
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...]
MachineBasicBlock.cpp
290
OS << ' ' << PrintReg(LI.
PhysReg
, TRI);
338
[Reg] (const RegisterMaskPair &LI) { return LI.
PhysReg
== Reg; });
350
[Reg] (const RegisterMaskPair &LI) { return LI.
PhysReg
== Reg; });
357
return LI0.
PhysReg
< LI1.
PhysReg
;
359
// Liveins are sorted by
physreg
now we can merge their lanemasks.
364
unsigned
PhysReg
= I->
PhysReg
;
366
for (J = std::next(I); J != LiveIns.end() && J->
PhysReg
==
PhysReg
; ++J
[
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...]
RegAllocGreedy.cpp
261
unsigned
PhysReg
;
266
// Interference for
PhysReg
.
274
PhysReg
= Reg;
294
/// Candidate info for each
PhysReg
in AllocationOrder.
355
unsigned canReassign(LiveInterval &VirtReg, unsigned
PhysReg
);
360
bool mayRecolorAllInterferences(unsigned
PhysReg
, LiveInterval &VirtReg,
382
unsigned
PhysReg
, unsigned &CostPerUseLimit,
408
/// In case of a physical register Reg ==
PhysReg
.
409
unsigned
PhysReg
;
410
HintInfo(BlockFrequency Freq, unsigned Reg, unsigned
PhysReg
)
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...]
/external/llvm/lib/CodeGen/SelectionDAG/
FunctionLoweringInfo.cpp
150
std::pair<unsigned, const TargetRegisterClass *>
PhysReg
=
153
if (
PhysReg
.first == SP)
/external/llvm/include/llvm/CodeGen/
MachineBasicBlock.h
76
MCPhysReg
PhysReg
;
79
RegisterMaskPair(MCPhysReg
PhysReg
, LaneBitmask LaneMask)
80
:
PhysReg
(
PhysReg
), LaneMask(LaneMask) {}
345
void addLiveIn(MCPhysReg
PhysReg
, LaneBitmask LaneMask = ~0u) {
346
LiveIns.push_back(RegisterMaskPair(
PhysReg
, LaneMask));
357
/// Add
PhysReg
as live in to this block, and ensure that there is a copy of
358
///
PhysReg
to a virtual register of class RC. Return the virtual register
359
/// that is a copy of the live in
PhysReg
.
360
unsigned addLiveIn(MCPhysReg
PhysReg
, const TargetRegisterClass *RC)
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...]
/external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp
632
struct PhysRegOp
PhysReg
;
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