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    Searched defs:RegisterPair (Results 1 - 6 of 6) sorted by null

  /art/compiler/utils/arm/
managed_register_arm.h 29 enum RegisterPair {
39 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg);
62 // [D..P[ core register pairs (enum RegisterPair)
81 // pair of core ARM registers (enum RegisterPair). A single register is either a
115 RegisterPair AsRegisterPair() const {
121 return static_cast<RegisterPair>(reg_low / 2);
200 static ArmManagedRegister FromRegisterPair(RegisterPair r) {
206 // Return a RegisterPair consisting of Register r_low and r_low + 1.
213 return FromRegisterPair(static_cast<RegisterPair>(r));
  /art/compiler/utils/mips/
managed_register_mips.h 28 enum RegisterPair {
45 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg);
68 // [D..P[ core register pairs (enum RegisterPair)
85 // FP register (enum DRegister), or a pair of core registers (enum RegisterPair).
182 static MipsManagedRegister FromRegisterPair(RegisterPair r) {
  /art/compiler/utils/x86/
managed_register_x86.h 30 enum RegisterPair {
46 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg);
68 // [S..P[ register pairs (enum RegisterPair)
87 // (enum RegisterPair).
126 RegisterPair AsRegisterPair() const {
128 return static_cast<RegisterPair>(id_ -
178 static X86ManagedRegister FromRegisterPair(RegisterPair r) {
  /art/compiler/utils/x86_64/
managed_register_x86_64.h 30 enum RegisterPair {
45 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg);
67 // [S..P[ register pairs (enum RegisterPair)
86 // (enum RegisterPair).
164 static X86_64ManagedRegister FromRegisterPair(RegisterPair r) {
  /external/llvm/lib/Target/Sparc/Disassembler/
SparcDisassembler.cpp 231 unsigned RegisterPair = IntPairDecoderTable[RegNo/2];
232 Inst.addOperand(MCOperand::createReg(RegisterPair));
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp     [all...]

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