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    Searched defs:SIInstrInfo (Results 1 - 4 of 4) sorted by null

  /external/mesa3d/src/gallium/drivers/radeon/
SIInstrInfo.cpp 1 //===-- SIInstrInfo.cpp - SI Instruction Information ---------------------===//
15 #include "SIInstrInfo.h"
25 SIInstrInfo::SIInstrInfo(AMDGPUTargetMachine &tm)
31 const SIRegisterInfo &SIInstrInfo::getRegisterInfo() const
37 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg,
63 bool SIInstrInfo::isMov(unsigned Opcode) const
SIInstrInfo.h 1 //===-- SIInstrInfo.h - SI Instruction Info Interface ---------------------===//
10 // Interface definition for SIInstrInfo.
23 class SIInstrInfo : public AMDGPUInstrInfo {
29 explicit SIInstrInfo(AMDGPUTargetMachine &tm);
  /external/llvm/lib/Target/AMDGPU/
SIInstrInfo.h 1 //===-- SIInstrInfo.h - SI Instruction Info Interface -----------*- C++ -*-===//
11 /// \brief Interface definition for SIInstrInfo.
25 class SIInstrInfo : public AMDGPUInstrInfo {
77 explicit SIInstrInfo(const AMDGPUSubtarget &st);
SIInstrInfo.cpp 1 //===-- SIInstrInfo.cpp - SI Instruction Information ---------------------===//
16 #include "SIInstrInfo.h"
30 SIInstrInfo::SIInstrInfo(const AMDGPUSubtarget &st)
77 bool SIInstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
92 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1,
204 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg,
291 bool SIInstrInfo::shouldClusterLoads(MachineInstr *FirstLdSt,
312 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
473 int SIInstrInfo::commuteOpcode(const MachineInstr &MI) const
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