1 /****************************************************************************** 2 * 3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 /** 19 ******************************************************************************* 20 * @file 21 * ihevc_defs.h 22 * 23 * @brief 24 * Definitions used in the codec 25 * 26 * @author 27 * Ittiam 28 * 29 * 30 * @remarks 31 * None 32 * 33 ******************************************************************************* 34 */ 35 #ifndef _IHEVC_DEFS_H_ 36 #define _IHEVC_DEFS_H_ 37 38 /*****************************************************************************/ 39 /* Profile and Levels */ 40 /*****************************************************************************/ 41 enum 42 { 43 IHEVC_PROFILE_MAIN = 0, 44 }; 45 46 enum 47 { 48 IHEVC_TIER_MAIN, 49 IHEVC_TIER_HIGH, 50 }; 51 52 53 /* Slice type enums - Do not change the values */ 54 55 enum 56 { 57 BSLICE = 0, 58 PSLICE = 1, 59 ISLICE = 2, 60 }; 61 62 /** Enum for Level : Multiplication by 30 as per spec is implemented as multiplied by 10 and then by 3 63 * User will give level multiplied by 10 in the API 64 */ 65 enum 66 { 67 IHEVC_LEVEL_10 = 10 * 3, 68 IHEVC_LEVEL_20 = 20 * 3, 69 IHEVC_LEVEL_21 = 21 * 3, 70 IHEVC_LEVEL_30 = 30 * 3, 71 IHEVC_LEVEL_31 = 31 * 3, 72 IHEVC_LEVEL_40 = 40 * 3, 73 IHEVC_LEVEL_41 = 41 * 3, 74 IHEVC_LEVEL_50 = 50 * 3, 75 IHEVC_LEVEL_51 = 51 * 3, 76 IHEVC_LEVEL_52 = 52 * 3, 77 IHEVC_LEVEL_60 = 60 * 3, 78 IHEVC_LEVEL_61 = 61 * 3, 79 IHEVC_LEVEL_62 = 62 * 3, 80 }; 81 82 83 enum 84 { 85 NAL_TRAIL_N = 0, 86 NAL_TRAIL_R, 87 NAL_TSA_N, 88 NAL_TSA_R, 89 NAL_STSA_N, 90 NAL_STSA_R, 91 NAL_RADL_N, 92 NAL_RADL_R, 93 NAL_RASL_N, 94 NAL_RASL_R, 95 NAL_RSV_VCL_N10 = 10, 96 NAL_RSV_VCL_N12 = 12, 97 NAL_RSV_VCL_N14 = 14, 98 NAL_RSV_VCL_R11 = 11, 99 NAL_RSV_VCL_R13 = 13, 100 NAL_RSV_VCL_R15 = 15, 101 102 NAL_BLA_W_LP = 16, 103 NAL_BLA_W_DLP, 104 NAL_BLA_N_LP, 105 NAL_IDR_W_LP, 106 NAL_IDR_N_LP, 107 NAL_CRA, 108 NAL_RSV_RAP_VCL22 = 22, 109 NAL_RSV_RAP_VCL23 = 23, 110 NAL_RSV_VCL24 = 24, 111 NAL_RSV_VCL31 = 31, 112 NAL_VPS = 32, 113 NAL_SPS, 114 NAL_PPS, 115 NAL_AUD, 116 NAL_EOS, 117 NAL_EOB, 118 NAL_FD, 119 NAL_PREFIX_SEI = 39, 120 NAL_SUFFIX_SEI = 40, 121 NAL_RSV_NVCL41 = 41, 122 NAL_RSV_NVCL47 = 47 , 123 NAL_UNSPEC48 = 48 , 124 NAL_UNSPEC63 = 49, 125 }; 126 127 enum 128 { 129 CHROMA_FMT_IDC_MONOCHROME = 0, 130 CHROMA_FMT_IDC_YUV420 = 1, 131 CHROMA_FMT_IDC_YUV422 = 2, 132 CHROMA_FMT_IDC_YUV444 = 3, 133 CHROMA_FMT_IDC_YUV444_PLANES = 4, 134 }; 135 136 /* Pred Modes */ 137 /* Do not change enum values */ 138 enum 139 { 140 PRED_MODE_INTER = 0, 141 PRED_MODE_INTRA = 1, 142 PRED_MODE_SKIP = 2 143 }; 144 145 /* Partition Modes */ 146 /* Do not change enum values */ 147 enum 148 { 149 PART_2Nx2N = 0, 150 PART_2NxN = 1, 151 PART_Nx2N = 2, 152 PART_NxN = 3, 153 PART_2NxnU = 4, 154 PART_2NxnD = 5, 155 PART_nLx2N = 6, 156 PART_nRx2N = 7 157 }; 158 159 /* Prediction list */ 160 /* Do not change enum values */ 161 enum 162 { 163 PRED_L0 = 0, 164 PRED_L1 = 1, 165 PRED_BI = 2 166 }; 167 168 /** 169 * Scan types 170 */ 171 enum 172 { 173 SCAN_DIAG_UPRIGHT, 174 SCAN_HORZ, 175 SCAN_VERT 176 }; 177 178 /** 179 * VUI aspect ratio indicator 180 */ 181 enum 182 { 183 SAR_UNUSED = 0, 184 SAR_1_1 = 1, 185 SAR_12_11, 186 SAR_10_11, 187 SAR_16_11, 188 SAR_40_33, 189 SAR_24_11, 190 SAR_20_11, 191 SAR_32_11, 192 SAR_80_33, 193 SAR_18_11, 194 SAR_15_11, 195 SAR_64_33, 196 SAR_160_99, 197 SAR_4_3, 198 SAR_3_2, 199 SAR_2_1, 200 EXTENDED_SAR = 255 201 }; 202 203 enum 204 { 205 VID_FMT_COMPONENT = 0, 206 VID_FMT_PAL, 207 VID_FMT_NTSC, 208 VID_FMT_SECAM, 209 VID_FMT_MAC, 210 VID_FMT_UNSPECIFIED 211 }; 212 213 typedef enum { 214 USER_DATA_BAR_DATA = 0, 215 USER_DATA_CC_DATA = 1, 216 USER_DATA_AFD_DATA = 2, 217 218 // do not add anything below 219 USER_DATA_MAX 220 } USER_DATA_SEI_TYPE_T; 221 222 223 #define BIT_DEPTH 8 224 #define BIT_DEPTH_LUMA BIT_DEPTH 225 #define BIT_DEPTH_CHROMA BIT_DEPTH 226 /*****************************************************************************/ 227 /* Profile tier level defs */ 228 /*****************************************************************************/ 229 #define MAX_PROFILE_COMPATBLTY 32 230 231 /*****************************************************************************/ 232 /* Reference frame defs */ 233 /*****************************************************************************/ 234 /* Maximum DPB size */ 235 #define MAX_DPB_SIZE 16 236 237 238 /*****************************************************************************/ 239 /* VPS restrictions */ 240 /*****************************************************************************/ 241 242 /* Number of VPS allowed in Main Profile */ 243 #define MAX_VPS_CNT 16 244 245 /* Max sub layers in VPS */ 246 #define VPS_MAX_SUB_LAYERS 7 247 248 /* Max number of HRD parameters */ 249 #define VPS_MAX_HRD_PARAMS 2 250 251 /* Maximum number of operation point layers */ 252 #define VPS_MAX_OP_LAYERS 2 253 254 255 /*****************************************************************************/ 256 /* Tile restrictions */ 257 /*****************************************************************************/ 258 /* Minimum tile width in Main Profile */ 259 #define MIN_TILE_WD MAX_CTB_SIZE 260 261 /* Minimum tile height in Main Profile */ 262 #define MIN_TILE_HT MAX_CTB_SIZE 263 264 /*****************************************************************************/ 265 /* SPS restrictions */ 266 /*****************************************************************************/ 267 268 /* Number of SPS allowed in Main Profile*/ 269 /* An extra buffer is allocated to write the parsed data 270 * It is copied to the appropriate location later */ 271 #define MAX_SPS_CNT (16 + 1) 272 273 /* Max sub layers in PPS */ 274 #define SPS_MAX_SUB_LAYERS 7 275 276 /* Maximum long term reference pics */ 277 #define MAX_LTREF_PICS_SPS 16 278 279 #define MAX_STREF_PICS_SPS 64 280 281 /*****************************************************************************/ 282 /* PPS restrictions */ 283 /*****************************************************************************/ 284 285 /* Number of PPS allowed in Main Profile */ 286 /* An extra buffer is allocated to write the parsed data 287 * It is copied to the appropriate location later */ 288 #define MAX_PPS_CNT (64 + 1) 289 290 /*****************************************************************************/ 291 /* Macro definitions for sizes of CTB, PU, TU, CU */ 292 /*****************************************************************************/ 293 294 /* CTB Size Range */ 295 #define MAX_CTB_SIZE 64 296 #define MIN_CTB_SIZE 16 297 298 /* TU Size Range */ 299 #define MAX_TU_SIZE 32 300 #define MIN_TU_SIZE 4 301 302 /* Max Transform Size */ 303 #define MAX_TRANS_SIZE (MAX_TU_SIZE*MAX_TU_SIZE) 304 305 /* PU Size Range */ 306 #define MAX_PU_SIZE 64 307 #define MIN_PU_SIZE 4 308 309 /* CU Size Range */ 310 #define MAX_CU_SIZE 64 311 #define MIN_CU_SIZE 8 312 313 314 /* Number of max TU in a CTB row */ 315 #define MAX_TU_IN_CTB_ROW ((MAX_CTB_SIZE / MIN_TU_SIZE)) 316 317 /* Number of max TU in a CTB row */ 318 #define MAX_CU_IN_CTB_ROW ((MAX_CTB_SIZE / MIN_CU_SIZE)) 319 320 /* Number of max PU in a CTb row */ 321 #define MAX_PU_IN_CTB_ROW ((MAX_CTB_SIZE / MIN_PU_SIZE)) 322 323 /* Number of max CU in a CTB */ 324 #define MAX_CU_IN_CTB ((MAX_CTB_SIZE / MIN_CU_SIZE) * \ 325 (MAX_CTB_SIZE / MIN_CU_SIZE)) 326 327 /* Number of max PU in a CTB */ 328 /*****************************************************************************/ 329 /* Note though for 64 x 64 CTB, Max PU in CTB is 128, in order to store */ 330 /* intra pred info, 256 entries are needed */ 331 /*****************************************************************************/ 332 #define MAX_PU_IN_CTB ((MAX_CTB_SIZE / MIN_PU_SIZE) * \ 333 (MAX_CTB_SIZE / MIN_PU_SIZE)) 334 335 /* Number of max TU in a CTB */ 336 #define MAX_TU_IN_CTB ((MAX_CTB_SIZE / MIN_TU_SIZE) * \ 337 (MAX_CTB_SIZE / MIN_TU_SIZE)) 338 339 340 341 /** 342 * Maximum transform depths 343 */ 344 #define MAX_TRAFO_DEPTH 5 345 346 347 348 349 /* Max number of deblocking edges */ 350 #define MAX_VERT_DEBLK_EDGES ((MAX_CTB_SIZE/8) * (MAX_CTB_SIZE/4)) 351 #define MAX_HORZ_DEBLK_EDGES ((MAX_CTB_SIZE/4) * (MAX_CTB_SIZE/8)) 352 353 /* Qp can not change below 8x8 level */ 354 #define MAX_DEBLK_QP_CNT ((MAX_CTB_SIZE/8) * (MAX_CTB_SIZE/8)) 355 356 /*****************************************************************************/ 357 /* Parsing related macros */ 358 /*****************************************************************************/ 359 #define SUBBLK_COEFF_CNT 16 360 361 /* Quant and Trans defs */ 362 363 /*****************************************************************************/ 364 /* Sizes for Transform functions */ 365 /*****************************************************************************/ 366 #define TRANS_SIZE_4 4 367 #define TRANS_SIZE_8 8 368 #define TRANS_SIZE_16 16 369 #define TRANS_SIZE_32 32 370 371 372 #define IT_SHIFT_STAGE_1 7 373 #define IT_SHIFT_STAGE_2 12 374 375 /** 376 * @brief Maximum transform dynamic range (excluding sign bit) 377 */ 378 #define MAX_TR_DYNAMIC_RANGE 15 379 380 /** 381 * @brief Q(QP%6) * IQ(QP%6) = 2^20 382 */ 383 #define QUANT_IQUANT_SHIFT 20 384 385 /** 386 * @brief Q factor for Qp%6 multiplication 387 */ 388 #define QUANT_SHIFT 14 389 390 /** 391 * @brief Q shift factor for flat rescale matrix weights 392 */ 393 #define FLAT_RESCALE_MAT_Q_SHIFT 11 394 395 /** 396 * @brief Scaling matrix is represented in Q15 format 397 */ 398 #define SCALING_Q_SHIFT 15 399 400 /** 401 * @brief rounding factor for quantization represented in Q9 format 402 */ 403 #define QUANT_ROUND_FACTOR_Q 9 404 405 /** 406 * @brief Minimum qp supported in HEVC spec 407 */ 408 #define MIN_HEVC_QP 0 409 410 /** 411 * @brief Maximum qp supported in HEVC spec 412 */ 413 #define MAX_HEVC_QP 51 //FOR MAIN Branch Encoder 414 415 #define MAX_HEVC_QP_10bit 63 //FOR HBD Branch Encoder 416 417 #define MAX_HEVC_QP_12bit 75 //FOR HBD Branch Encoder 418 419 420 /** 421 * @brief Total number of transform sizes 422 * used for sizeID while getting scale matrix 423 */ 424 #define NUM_UNIQUE_TRANS_SIZE 4 425 426 /*****************************************************************************/ 427 /* Number of scaling matrices for each transform size */ 428 /*****************************************************************************/ 429 #define SCALE_MAT_CNT_TRANS_SIZE_4 6 430 #define SCALE_MAT_CNT_TRANS_SIZE_8 6 431 #define SCALE_MAT_CNT_TRANS_SIZE_16 6 432 #define SCALE_MAT_CNT_TRANS_SIZE_32 2 433 434 /* Maximum number of scale matrices for a given transform size */ 435 #define SCALE_MAT_CNT_MAX_PER_TRANS_SIZE 6 436 437 /* Total number of scale matrices */ 438 #define TOTAL_SCALE_MAT_COUNT (SCALE_MAT_CNT_TRANS_SIZE_4 + \ 439 SCALE_MAT_CNT_TRANS_SIZE_8 + \ 440 SCALE_MAT_CNT_TRANS_SIZE_16 + \ 441 SCALE_MAT_CNT_TRANS_SIZE_32) 442 443 444 /*****************************************************************************/ 445 /* Intra pred Macros */ 446 /*****************************************************************************/ 447 /** Planar Intra prediction mode */ 448 #define INTRA_PLANAR 0 449 450 /** DC Intra prediction mode */ 451 #define INTRA_DC 1 452 453 /** Gives angular mode for intra prediction */ 454 #define INTRA_ANGULAR(x) (x) 455 456 /** Following is used to signal no intra prediction in case of pcm blocks 457 */ 458 #define INTRA_PRED_NONE 63 459 460 461 /** Following is used to signal no intra prediction is needed for first three 462 * 4x4 luma blocks in case of 4x4 TU sizes 463 * Also used in pcm cases 464 */ 465 #define INTRA_PRED_CHROMA_IDX_NONE 7 466 467 468 #define MAX_NUM_CLOCK_TS 3 469 #define MAX_USERDATA_PAYLOAD 256 470 471 #define MAX_CPB_CNT 32 472 473 #endif /*__IHEVC_DEFS_H_*/ 474
