HomeSort by relevance Sort by last modified time
    Searched defs:Src2 (Results 1 - 9 of 9) sorted by null

  /external/llvm/lib/Target/AMDGPU/
SIShrinkInstructions.cpp 90 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2);
97 if (Src2) {
102 if (!isVGPR(Src2, TRI, MRI) ||
271 const MachineOperand *Src2 =
272 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
273 if (!Src2->isReg())
275 unsigned SReg = Src2->getReg();
309 const MachineOperand *Src2 =
310 TII->getNamedOperand(MI, AMDGPU::OpName::src2);
    [all...]
SIInstrInfo.cpp     [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonPeephole.cpp 160 MachineOperand &Src2 = MI->getOperand(2);
164 unsigned SrcReg = Src2.getReg();
177 MachineOperand &Src2 = MI->getOperand(2);
178 if (Src2.getImm() != 32)
HexagonGenMux.cpp 93 const MachineOperand &Src2) const;
172 const MachineOperand &Src2) const {
173 bool IsReg1 = Src1.isReg(), IsReg2 = Src2.isReg();
181 if (Src2.isImm() && isInt<8>(Src2.getImm()))
262 MachineOperand *Src1 = &Def1->getOperand(2), *Src2 = &Def2->getOperand(2);
264 unsigned SR2 = Src2->isReg() ? Src2->getReg() : 0;
280 MachineOperand *SrcT = (MinX == CI.TrueX) ? Src1 : Src2;
281 MachineOperand *SrcF = (MinX == CI.FalseX) ? Src1 : Src2;
    [all...]
  /external/llvm/lib/Target/X86/
X86FixupLEAs.cpp 147 // if src1 != src2, then convertToThreeAddress will
370 const MachineOperand &Src2 = MI->getOperand(SrcR1 == DstR ? 3 : 1);
374 .addOperand(Src2);
X86InstrInfo.cpp     [all...]
  /external/llvm/lib/Target/Sparc/
SparcISelLowering.cpp     [all...]
  /external/clang/lib/CodeGen/
CGBuiltin.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]

Completed in 213 milliseconds