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    Searched defs:SrcRC (Results 1 - 9 of 9) sorted by null

  /external/llvm/lib/Target/AMDGPU/
SILowerI1Copies.cpp 108 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src.getReg());
111 TRI->getCommonSubClass(SrcRC, &AMDGPU::SGPR_64RegClass)) {
138 SrcRC == &AMDGPU::VReg_1RegClass) {
SIFixSGPRCopies.cpp 135 const TargetRegisterClass *SrcRC =
141 // SrcRC = TRI.getSubRegClass(SrcRC, Copy.getOperand(1).getSubReg());
148 return std::make_pair(SrcRC, DstRC);
151 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC,
154 return TRI.isSGPRClass(DstRC) && TRI.hasVGPRs(SrcRC);
157 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC,
160 return TRI.isSGPRClass(SrcRC) && TRI.hasVGPRs(DstRC);
193 const TargetRegisterClass *SrcRC, *DstRC;
194 std::tie(SrcRC, DstRC) = getCopyRegClasses(CopyUse, *TRI, MRI)
    [all...]
  /external/llvm/lib/Target/NVPTX/
NVPTXInstrInfo.cpp 38 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg);
40 if (DestRC->getSize() != SrcRC->getSize())
49 Op = (SrcRC == &NVPTX::Int32RegsRegClass ? NVPTX::IMOV32rr
52 Op = (SrcRC == &NVPTX::Int64RegsRegClass ? NVPTX::IMOV64rr
55 Op = (SrcRC == &NVPTX::Float32RegsRegClass ? NVPTX::FMOV32rr
58 Op = (SrcRC == &NVPTX::Float64RegsRegClass ? NVPTX::FMOV64rr
  /external/llvm/lib/Target/PowerPC/
PPCVSXCopy.cpp 107 const TargetRegisterClass *SrcRC =
116 unsigned NewVReg = MRI.createVirtualRegister(SrcRC);
  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 156 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr;
157 SrcRC = TRI->getMinimalPhysRegClass(SrcReg, VT);
171 if (MatchReg && SrcRC->getCopyCost() < 0) {
    [all...]
  /external/llvm/lib/CodeGen/
PeepholeOptimizer.cpp 685 const TargetRegisterClass *SrcRC = MRI->getRegClass(CurSrcPair.Reg);
686 ShouldRewrite = TRI->shouldRewriteCopySrc(DefRC, SubReg, SrcRC,
    [all...]
RegisterCoalescer.cpp 342 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src);
351 NewRC = TRI.getCommonSuperRegClass(SrcRC, SrcSub, DstRC, DstSub,
358 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub);
362 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub);
365 NewRC = TRI.getCommonSubClass(DstRC, SrcRC);
380 CrossClass = NewRC != DstRC || NewRC != SrcRC;
    [all...]
  /external/llvm/lib/Target/ARM/
ARMFastISel.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86FastISel.cpp     [all...]

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