| /external/llvm/lib/CodeGen/ |
| LiveRangeEdit.cpp | 166 MachineInstr *DefMI = nullptr, *UseMI = nullptr;
178 if (UseMI && UseMI != MI)
183 UseMI = MI;
186 if (!DefMI || !UseMI)
193 LIS.getInstructionIndex(UseMI)))
197 // Assume there are stores between DefMI and UseMI.
203 << " into single use: " << *UseMI);
206 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
209 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI)
[all...] |
| RegisterScavenging.cpp | 286 /// longest after StartMII. UseMI is set to the instruction where the search
294 MachineBasicBlock::iterator &UseMI) {
352 UseMI = RestorePointMI;
389 MachineBasicBlock::iterator UseMI;
390 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI);
415 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
427 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, Scavenged[SI].FrameIndex,
429 II = std::prev(UseMI);
435 Scavenged[SI].Restore = std::prev(UseMI);
|
| MachineRegisterInfo.cpp | 439 MachineInstr *UseMI = &*I;
440 if (UseMI->isDebugValue())
441 UseMI->getOperand(0).setReg(0U);
|
| MachineSSAUpdater.cpp | 223 MachineInstr *UseMI = U.getParent();
225 if (UseMI->isPHI()) {
226 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
229 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
|
| RegAllocFast.cpp | 601 const MachineInstr &UseMI = *MRI->use_instr_nodbg_begin(VirtReg);
603 if (UseMI.isCopyLike())
604 Hint = UseMI.getOperand(0).getReg();
[all...] |
| TailDuplication.cpp | 271 MachineInstr *UseMI = UseMO.getParent();
273 if (UseMI->isDebugValue()) {
278 UseMI->eraseFromParent();
281 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
346 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) {
347 if (UseMI.isDebugValue())
349 if (UseMI.getParent() != BB)
[all...] |
| LiveIntervalAnalysis.cpp | 439 MachineInstr *UseMI = &*(I++);
440 if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg))
442 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
449 DEBUG(dbgs() << Idx << '\t' << *UseMI
539 MachineInstr *UseMI = MO.getParent();
540 if (UseMI->isDebugValue())
550 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
[all...] |
| PeepholeOptimizer.cpp | 456 MachineInstr *UseMI = UseMO.getParent();
457 if (UseMI == MI)
460 if (UseMI->isPHI()) {
486 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
489 MachineBasicBlock *UseMBB = UseMI->getParent();
492 if (!LocalMIs.count(UseMI))
529 MachineInstr *UseMI = UseMO->getParent();
530 MachineBasicBlock *UseMBB = UseMI->getParent();
541 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc()
[all...] |
| RegisterCoalescer.cpp | 693 MachineInstr *UseMI = MO.getParent();
694 unsigned OpNo = &MO - &UseMI->getOperand(0);
695 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
700 if (UseMI->isRegTiedToDefOperand(OpNo))
742 MachineInstr *UseMI = UseMO.getParent();
743 if (UseMI->isDebugValue()) {
749 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
760 if (UseMI == CopyMI)
762 if (!UseMI->isCopy())
764 if (UseMI->getOperand(0).getReg() != IntB.reg |
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIFoldOperands.cpp | 55 MachineInstr *UseMI;
61 UseMI(MI), UseOpNo(OpNo) {
109 MachineInstr *MI = Fold.UseMI;
133 if (Candidate.UseMI == MI)
199 static void foldOperand(MachineOperand &OpToFold, MachineInstr *UseMI,
205 const MachineOperand &UseOp = UseMI->getOperand(UseOpIdx);
244 if (UseMI->getOpcode() == AMDGPU::COPY) {
245 unsigned DestReg = UseMI->getOperand(0).getReg();
255 UseMI->setDesc(TII->get(MovOp));
256 CopiesToReplace.push_back(UseMI);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 124 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg);
125 if (UseMI->getParent() != MBB)
128 while (UseMI->isCopy() || UseMI->isInsertSubreg()) {
129 Reg = UseMI->getOperand(0).getReg();
133 UseMI = &*MRI->use_instr_nodbg_begin(Reg);
134 if (UseMI->getParent() != MBB)
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXFMAMutate.cpp | 266 MachineInstr *UseMI = UseMO.getParent();
270 if (UseMI == AddendMI)
|
| PPCInstrInfo.cpp | 142 const MachineInstr *UseMI,
145 UseMI, UseIdx);
164 if (UseMI->isBranch() && IsRegCR) {
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | 565 MachineInstr *UseMI = &*(UI++);
566 if (UseMI->isDebugValue()) continue;
567 if (UseMI->isCopy() && !CopyUseMI && UseMI->getParent() == EntryMBB) {
568 CopyUseMI = UseMI; continue;
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | [all...] |
