/external/llvm/tools/llvm-pdbdump/ |
CompilandDumper.cpp | 116 uint64_t VA = Symbol.getVirtualAddress(); 119 WithColor(Printer, PDB_ColorItem::Address).get() << format_hex(VA, 10); 124 << "[" << format_hex(VA, 10) << " - " 125 << format_hex(VA + Symbol.getLength(), 10) << "]";
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/external/clang/test/Parser/ |
cxx-using-declaration.cpp | 4 int VA; 9 using A::VA; 15 VA = 1;
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/external/clang/test/Preprocessor/ |
macro_paste_bad.c | 32 #define VA __VA_ ## ARGS__ 33 int VA; // expected-warning {{__VA_ARGS__ can only appear in the expansion of a C99 variadic macro}}
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/external/skia/src/sfnt/ |
SkOTTable_OS_2.h | 31 struct VA : SkOTTableOS2_VA { } vA; 45 static_assert(sizeof(SkOTTableOS2::Version::VA) == 68, "sizeof_SkOTTableOS2__VA_not_68");
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/external/clang/test/CXX/special/class.dtor/ |
p3-0x.cpp | 140 struct VA { 142 virtual ~VA() {} 145 struct VB : VA 149 struct TVB : VA
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/external/llvm/lib/Target/BPF/ |
BPFISelLowering.cpp | 208 for (auto &VA : ArgLocs) { 209 if (VA.isRegLoc()) { 211 EVT RegVT = VA.getLocVT(); 220 RegInfo.addLiveIn(VA.getLocReg(), VReg); 226 if (VA.getLocInfo() == CCValAssign::SExt) 228 DAG.getValueType(VA.getValVT())); 229 else if (VA.getLocInfo() == CCValAssign::ZExt) 231 DAG.getValueType(VA.getValVT())); 233 if (VA.getLocInfo() != CCValAssign::Full) 234 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue) [all...] |
/external/mksh/src/ |
shf.c | 774 #define VA(type) va_arg(args, type) 823 tmp = VA(int); 884 lnum = (long)VA(ssize_t); 886 lnum = VA(long); 888 lnum = (long)(short)VA(int); 890 lnum = (long)VA(int); 897 lnum = VA(size_t); 899 lnum = VA(unsigned long); 901 lnum = (unsigned long)(unsigned short)VA(int); 903 lnum = (unsigned long)VA(unsigned int) [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombinePHI.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 449 CCValAssign &VA = ArgLocs[i]; 450 if (VA.isRegLoc()) { 452 EVT RegVT = VA.getLocVT(); 464 RegInfo.addLiveIn(VA.getLocReg(), VReg); 470 if (VA.getLocInfo() == CCValAssign::SExt) 472 DAG.getValueType(VA.getValVT())); 473 else if (VA.getLocInfo() == CCValAssign::ZExt) 475 DAG.getValueType(VA.getValVT())); 477 if (VA.getLocInfo() != CCValAssign::Full) 478 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue) [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 799 // Value is a value that has been passed to us in the location described by VA 800 // (and so has type VA.getLocVT()). Convert Value to VA.getValVT(), chaining 803 CCValAssign &VA, SDValue Chain, 807 if (VA.getLocInfo() == CCValAssign::SExt) 808 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, 809 DAG.getValueType(VA.getValVT())); 810 else if (VA.getLocInfo() == CCValAssign::ZExt) 811 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, 812 DAG.getValueType(VA.getValVT())) [all...] |
/external/llvm/lib/Target/AMDGPU/ |
R600ISelLowering.cpp | [all...] |
SIISelLowering.cpp | 685 CCValAssign &VA = ArgLocs[ArgIdx++]; 686 MVT VT = VA.getLocVT(); 688 if (VA.isMemLoc()) { 692 VA.getLocMemOffset(); 714 assert(VA.isRegLoc() && "Parameter must be in a register!"); 716 unsigned Reg = VA.getLocReg(); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsFastISel.cpp | [all...] |
MipsISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | [all...] |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | 578 CCValAssign &VA = RVLocs[i]; 580 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); 584 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 697 CCValAssign &VA = ArgLocs[i]; 698 if (VA.isMemLoc()) { 720 CCValAssign &VA = ArgLocs[i]; 724 bool ArgAlign = IsHvxVectorType(VA.getValVT()); 728 switch (VA.getLocInfo()) { 736 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg) [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 231 CCValAssign &VA = RVLocs[i]; 232 assert(VA.isRegLoc() && "Can only return in registers!"); 236 if (VA.needsCustom()) { 237 assert(VA.getLocVT() == MVT::v2i32); 248 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag); 250 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 251 VA = RVLocs[++i]; // skip ahead to next loc 252 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1, 255 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag) [all...] |
/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | [all...] |
X86ISelLowering.cpp | [all...] |
/toolchain/binutils/binutils-2.25/opcodes/ |
ppc-opc.c | 160 as the VA field in the same instruction. */ 674 /* The VA field in a VA, VX or VXR form instruction. */ 675 #define VA UI7 + 1 678 /* The VB field in a VA, VX or VXR form instruction. */ 679 #define VB VA + 1 682 /* The VC field in a VA form instruction. */ 686 /* The VD or VS field in a VA, VX, VXR or X form instruction. */ 713 /* The SHB field in a VA form instruction. */ [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |