1 .syntax unified 2 .cpu cortex-a8 3 .thumb 4 .text 5 6 @ expansion 32 bytes 7 .macro bw1 8 1: 9 add.w r0, r1, r2 10 blx.w arm_target 11 add.w r0, r1, r2 12 blx.w arm_target 13 add.w r0, r1, r2 14 blx.w arm_target 15 add.w r0, r1, r2 16 blx.w arm_target 17 .endm 18 19 @ expansion 128 bytes 20 .macro bw2 21 bw1 22 bw1 23 bw1 24 bw1 25 .endm 26 27 @ expansion 32 bytes 28 .macro bw3 29 1: 30 add.w r0, r1, r2 31 bne.w 1b 32 add.w r0, r1, r2 33 bne.w 1b 34 add.w r0, r1, r2 35 bne.w 1b 36 add.w r0, r1, r2 37 bne.w 1b 38 .endm 39 40 @ expansion 128 bytes 41 .macro bw4 42 bw3 43 bw3 44 bw3 45 bw3 46 .endm 47 48 .align 3 49 .global _start 50 51 .thumb 52 .thumb_func 53 .type _start, %function 54 _start: 55 nop 56 57 @ Trigger Cortex-A8 erratum workaround with b<cond> instructions. 58 bw4 59 bw4 60 61 nop 62 63 .rept 957 64 nop.w 65 .endr 66 67 .arm 68 arm_target: 69 add r3, r4, r5 70 bx lr 71 72 .thumb 73 bl_insns: 74 75 nop 76 77 @ ...and again with bl instructions. 78 bw2 79 bw2 80 81 bx lr 82
