1 /* Disassembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-dis.in isn't 6 7 Copyright (C) 1996-2014 Free Software Foundation, Inc. 8 9 This file is part of libopcodes. 10 11 This library is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 3, or (at your option) 14 any later version. 15 16 It is distributed in the hope that it will be useful, but WITHOUT 17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software Foundation, Inc., 23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 24 25 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 26 Keep that in mind. */ 27 28 #include "sysdep.h" 29 #include <stdio.h> 30 #include "ansidecl.h" 31 #include "dis-asm.h" 32 #include "bfd.h" 33 #include "symcat.h" 34 #include "libiberty.h" 35 #include "mt-desc.h" 36 #include "mt-opc.h" 37 #include "opintl.h" 38 39 /* Default text to print if an instruction isn't recognized. */ 40 #define UNKNOWN_INSN_MSG _("*unknown*") 41 42 static void print_normal 43 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); 44 static void print_address 45 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; 46 static void print_keyword 47 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; 48 static void print_insn_normal 49 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); 50 static int print_insn 51 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); 52 static int default_print_insn 53 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; 54 static int read_insn 55 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, 56 unsigned long *); 57 58 /* -- disassembler routines inserted here. */ 60 61 /* -- dis.c */ 62 static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int); 63 static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int); 64 65 static void 66 print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 67 void * dis_info, 68 long value, 69 unsigned int attrs ATTRIBUTE_UNUSED, 70 bfd_vma pc ATTRIBUTE_UNUSED, 71 int length ATTRIBUTE_UNUSED) 72 { 73 disassemble_info *info = (disassemble_info *) dis_info; 74 75 info->fprintf_func (info->stream, "$%lx", value & 0xffffffff); 76 77 if (0) 78 print_normal (cd, dis_info, value, attrs, pc, length); 79 } 80 81 static void 82 print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 83 void * dis_info, 84 long value, 85 unsigned int attrs ATTRIBUTE_UNUSED, 86 bfd_vma pc ATTRIBUTE_UNUSED, 87 int length ATTRIBUTE_UNUSED) 88 { 89 print_address (cd, dis_info, value + pc, attrs, pc, length); 90 } 91 92 /* -- */ 93 94 void mt_cgen_print_operand 95 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); 96 97 /* Main entry point for printing operands. 98 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement 99 of dis-asm.h on cgen.h. 100 101 This function is basically just a big switch statement. Earlier versions 102 used tables to look up the function to use, but 103 - if the table contains both assembler and disassembler functions then 104 the disassembler contains much of the assembler and vice-versa, 105 - there's a lot of inlining possibilities as things grow, 106 - using a switch statement avoids the function call overhead. 107 108 This function could be moved into `print_insn_normal', but keeping it 109 separate makes clear the interface between `print_insn_normal' and each of 110 the handlers. */ 111 112 void 113 mt_cgen_print_operand (CGEN_CPU_DESC cd, 114 int opindex, 115 void * xinfo, 116 CGEN_FIELDS *fields, 117 void const *attrs ATTRIBUTE_UNUSED, 118 bfd_vma pc, 119 int length) 120 { 121 disassemble_info *info = (disassemble_info *) xinfo; 122 123 switch (opindex) 124 { 125 case MT_OPERAND_A23 : 126 print_dollarhex (cd, info, fields->f_a23, 0, pc, length); 127 break; 128 case MT_OPERAND_BALL : 129 print_dollarhex (cd, info, fields->f_ball, 0, pc, length); 130 break; 131 case MT_OPERAND_BALL2 : 132 print_dollarhex (cd, info, fields->f_ball2, 0, pc, length); 133 break; 134 case MT_OPERAND_BANKADDR : 135 print_dollarhex (cd, info, fields->f_bankaddr, 0, pc, length); 136 break; 137 case MT_OPERAND_BRC : 138 print_dollarhex (cd, info, fields->f_brc, 0, pc, length); 139 break; 140 case MT_OPERAND_BRC2 : 141 print_dollarhex (cd, info, fields->f_brc2, 0, pc, length); 142 break; 143 case MT_OPERAND_CB1INCR : 144 print_dollarhex (cd, info, fields->f_cb1incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); 145 break; 146 case MT_OPERAND_CB1SEL : 147 print_dollarhex (cd, info, fields->f_cb1sel, 0, pc, length); 148 break; 149 case MT_OPERAND_CB2INCR : 150 print_dollarhex (cd, info, fields->f_cb2incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); 151 break; 152 case MT_OPERAND_CB2SEL : 153 print_dollarhex (cd, info, fields->f_cb2sel, 0, pc, length); 154 break; 155 case MT_OPERAND_CBRB : 156 print_dollarhex (cd, info, fields->f_cbrb, 0, pc, length); 157 break; 158 case MT_OPERAND_CBS : 159 print_dollarhex (cd, info, fields->f_cbs, 0, pc, length); 160 break; 161 case MT_OPERAND_CBX : 162 print_dollarhex (cd, info, fields->f_cbx, 0, pc, length); 163 break; 164 case MT_OPERAND_CCB : 165 print_dollarhex (cd, info, fields->f_ccb, 0, pc, length); 166 break; 167 case MT_OPERAND_CDB : 168 print_dollarhex (cd, info, fields->f_cdb, 0, pc, length); 169 break; 170 case MT_OPERAND_CELL : 171 print_dollarhex (cd, info, fields->f_cell, 0, pc, length); 172 break; 173 case MT_OPERAND_COLNUM : 174 print_dollarhex (cd, info, fields->f_colnum, 0, pc, length); 175 break; 176 case MT_OPERAND_CONTNUM : 177 print_dollarhex (cd, info, fields->f_contnum, 0, pc, length); 178 break; 179 case MT_OPERAND_CR : 180 print_dollarhex (cd, info, fields->f_cr, 0, pc, length); 181 break; 182 case MT_OPERAND_CTXDISP : 183 print_dollarhex (cd, info, fields->f_ctxdisp, 0, pc, length); 184 break; 185 case MT_OPERAND_DUP : 186 print_dollarhex (cd, info, fields->f_dup, 0, pc, length); 187 break; 188 case MT_OPERAND_FBDISP : 189 print_dollarhex (cd, info, fields->f_fbdisp, 0, pc, length); 190 break; 191 case MT_OPERAND_FBINCR : 192 print_dollarhex (cd, info, fields->f_fbincr, 0, pc, length); 193 break; 194 case MT_OPERAND_FRDR : 195 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_dr, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 196 break; 197 case MT_OPERAND_FRDRRR : 198 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_drrr, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 199 break; 200 case MT_OPERAND_FRSR1 : 201 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr1, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 202 break; 203 case MT_OPERAND_FRSR2 : 204 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr2, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 205 break; 206 case MT_OPERAND_ID : 207 print_dollarhex (cd, info, fields->f_id, 0, pc, length); 208 break; 209 case MT_OPERAND_IMM16 : 210 print_dollarhex (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); 211 break; 212 case MT_OPERAND_IMM16L : 213 print_dollarhex (cd, info, fields->f_imm16l, 0, pc, length); 214 break; 215 case MT_OPERAND_IMM16O : 216 print_pcrel (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 217 break; 218 case MT_OPERAND_IMM16Z : 219 print_dollarhex (cd, info, fields->f_imm16u, 0, pc, length); 220 break; 221 case MT_OPERAND_INCAMT : 222 print_dollarhex (cd, info, fields->f_incamt, 0, pc, length); 223 break; 224 case MT_OPERAND_INCR : 225 print_dollarhex (cd, info, fields->f_incr, 0, pc, length); 226 break; 227 case MT_OPERAND_LENGTH : 228 print_dollarhex (cd, info, fields->f_length, 0, pc, length); 229 break; 230 case MT_OPERAND_LOOPSIZE : 231 print_pcrel (cd, info, fields->f_loopo, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 232 break; 233 case MT_OPERAND_MASK : 234 print_dollarhex (cd, info, fields->f_mask, 0, pc, length); 235 break; 236 case MT_OPERAND_MASK1 : 237 print_dollarhex (cd, info, fields->f_mask1, 0, pc, length); 238 break; 239 case MT_OPERAND_MODE : 240 print_dollarhex (cd, info, fields->f_mode, 0, pc, length); 241 break; 242 case MT_OPERAND_PERM : 243 print_dollarhex (cd, info, fields->f_perm, 0, pc, length); 244 break; 245 case MT_OPERAND_RBBC : 246 print_dollarhex (cd, info, fields->f_rbbc, 0, pc, length); 247 break; 248 case MT_OPERAND_RC : 249 print_dollarhex (cd, info, fields->f_rc, 0, pc, length); 250 break; 251 case MT_OPERAND_RC1 : 252 print_dollarhex (cd, info, fields->f_rc1, 0, pc, length); 253 break; 254 case MT_OPERAND_RC2 : 255 print_dollarhex (cd, info, fields->f_rc2, 0, pc, length); 256 break; 257 case MT_OPERAND_RC3 : 258 print_dollarhex (cd, info, fields->f_rc3, 0, pc, length); 259 break; 260 case MT_OPERAND_RCNUM : 261 print_dollarhex (cd, info, fields->f_rcnum, 0, pc, length); 262 break; 263 case MT_OPERAND_RDA : 264 print_dollarhex (cd, info, fields->f_rda, 0, pc, length); 265 break; 266 case MT_OPERAND_ROWNUM : 267 print_dollarhex (cd, info, fields->f_rownum, 0, pc, length); 268 break; 269 case MT_OPERAND_ROWNUM1 : 270 print_dollarhex (cd, info, fields->f_rownum1, 0, pc, length); 271 break; 272 case MT_OPERAND_ROWNUM2 : 273 print_dollarhex (cd, info, fields->f_rownum2, 0, pc, length); 274 break; 275 case MT_OPERAND_SIZE : 276 print_dollarhex (cd, info, fields->f_size, 0, pc, length); 277 break; 278 case MT_OPERAND_TYPE : 279 print_dollarhex (cd, info, fields->f_type, 0, pc, length); 280 break; 281 case MT_OPERAND_WR : 282 print_dollarhex (cd, info, fields->f_wr, 0, pc, length); 283 break; 284 case MT_OPERAND_XMODE : 285 print_dollarhex (cd, info, fields->f_xmode, 0, pc, length); 286 break; 287 288 default : 289 /* xgettext:c-format */ 290 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), 291 opindex); 292 abort (); 293 } 294 } 295 296 cgen_print_fn * const mt_cgen_print_handlers[] = 297 { 298 print_insn_normal, 299 }; 300 301 302 void 303 mt_cgen_init_dis (CGEN_CPU_DESC cd) 304 { 305 mt_cgen_init_opcode_table (cd); 306 mt_cgen_init_ibld_table (cd); 307 cd->print_handlers = & mt_cgen_print_handlers[0]; 308 cd->print_operand = mt_cgen_print_operand; 309 } 310 311 312 /* Default print handler. */ 314 315 static void 316 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 317 void *dis_info, 318 long value, 319 unsigned int attrs, 320 bfd_vma pc ATTRIBUTE_UNUSED, 321 int length ATTRIBUTE_UNUSED) 322 { 323 disassemble_info *info = (disassemble_info *) dis_info; 324 325 /* Print the operand as directed by the attributes. */ 326 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 327 ; /* nothing to do */ 328 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 329 (*info->fprintf_func) (info->stream, "%ld", value); 330 else 331 (*info->fprintf_func) (info->stream, "0x%lx", value); 332 } 333 334 /* Default address handler. */ 335 336 static void 337 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 338 void *dis_info, 339 bfd_vma value, 340 unsigned int attrs, 341 bfd_vma pc ATTRIBUTE_UNUSED, 342 int length ATTRIBUTE_UNUSED) 343 { 344 disassemble_info *info = (disassemble_info *) dis_info; 345 346 /* Print the operand as directed by the attributes. */ 347 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 348 ; /* Nothing to do. */ 349 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) 350 (*info->print_address_func) (value, info); 351 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) 352 (*info->print_address_func) (value, info); 353 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 354 (*info->fprintf_func) (info->stream, "%ld", (long) value); 355 else 356 (*info->fprintf_func) (info->stream, "0x%lx", (long) value); 357 } 358 359 /* Keyword print handler. */ 360 361 static void 362 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 363 void *dis_info, 364 CGEN_KEYWORD *keyword_table, 365 long value, 366 unsigned int attrs ATTRIBUTE_UNUSED) 367 { 368 disassemble_info *info = (disassemble_info *) dis_info; 369 const CGEN_KEYWORD_ENTRY *ke; 370 371 ke = cgen_keyword_lookup_value (keyword_table, value); 372 if (ke != NULL) 373 (*info->fprintf_func) (info->stream, "%s", ke->name); 374 else 375 (*info->fprintf_func) (info->stream, "???"); 376 } 377 378 /* Default insn printer. 380 381 DIS_INFO is defined as `void *' so the disassembler needn't know anything 382 about disassemble_info. */ 383 384 static void 385 print_insn_normal (CGEN_CPU_DESC cd, 386 void *dis_info, 387 const CGEN_INSN *insn, 388 CGEN_FIELDS *fields, 389 bfd_vma pc, 390 int length) 391 { 392 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 393 disassemble_info *info = (disassemble_info *) dis_info; 394 const CGEN_SYNTAX_CHAR_TYPE *syn; 395 396 CGEN_INIT_PRINT (cd); 397 398 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 399 { 400 if (CGEN_SYNTAX_MNEMONIC_P (*syn)) 401 { 402 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); 403 continue; 404 } 405 if (CGEN_SYNTAX_CHAR_P (*syn)) 406 { 407 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); 408 continue; 409 } 410 411 /* We have an operand. */ 412 mt_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, 413 fields, CGEN_INSN_ATTRS (insn), pc, length); 414 } 415 } 416 417 /* Subroutine of print_insn. Reads an insn into the given buffers and updates 419 the extract info. 420 Returns 0 if all is well, non-zero otherwise. */ 421 422 static int 423 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 424 bfd_vma pc, 425 disassemble_info *info, 426 bfd_byte *buf, 427 int buflen, 428 CGEN_EXTRACT_INFO *ex_info, 429 unsigned long *insn_value) 430 { 431 int status = (*info->read_memory_func) (pc, buf, buflen, info); 432 433 if (status != 0) 434 { 435 (*info->memory_error_func) (status, pc, info); 436 return -1; 437 } 438 439 ex_info->dis_info = info; 440 ex_info->valid = (1 << buflen) - 1; 441 ex_info->insn_bytes = buf; 442 443 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); 444 return 0; 445 } 446 447 /* Utility to print an insn. 448 BUF is the base part of the insn, target byte order, BUFLEN bytes long. 449 The result is the size of the insn in bytes or zero for an unknown insn 450 or -1 if an error occurs fetching data (memory_error_func will have 451 been called). */ 452 453 static int 454 print_insn (CGEN_CPU_DESC cd, 455 bfd_vma pc, 456 disassemble_info *info, 457 bfd_byte *buf, 458 unsigned int buflen) 459 { 460 CGEN_INSN_INT insn_value; 461 const CGEN_INSN_LIST *insn_list; 462 CGEN_EXTRACT_INFO ex_info; 463 int basesize; 464 465 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ 466 basesize = cd->base_insn_bitsize < buflen * 8 ? 467 cd->base_insn_bitsize : buflen * 8; 468 insn_value = cgen_get_insn_value (cd, buf, basesize); 469 470 471 /* Fill in ex_info fields like read_insn would. Don't actually call 472 read_insn, since the incoming buffer is already read (and possibly 473 modified a la m32r). */ 474 ex_info.valid = (1 << buflen) - 1; 475 ex_info.dis_info = info; 476 ex_info.insn_bytes = buf; 477 478 /* The instructions are stored in hash lists. 479 Pick the first one and keep trying until we find the right one. */ 480 481 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); 482 while (insn_list != NULL) 483 { 484 const CGEN_INSN *insn = insn_list->insn; 485 CGEN_FIELDS fields; 486 int length; 487 unsigned long insn_value_cropped; 488 489 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 490 /* Not needed as insn shouldn't be in hash lists if not supported. */ 491 /* Supported by this cpu? */ 492 if (! mt_cgen_insn_supported (cd, insn)) 493 { 494 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 495 continue; 496 } 497 #endif 498 499 /* Basic bit mask must be correct. */ 500 /* ??? May wish to allow target to defer this check until the extract 501 handler. */ 502 503 /* Base size may exceed this instruction's size. Extract the 504 relevant part from the buffer. */ 505 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && 506 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 507 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 508 info->endian == BFD_ENDIAN_BIG); 509 else 510 insn_value_cropped = insn_value; 511 512 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) 513 == CGEN_INSN_BASE_VALUE (insn)) 514 { 515 /* Printing is handled in two passes. The first pass parses the 516 machine insn and extracts the fields. The second pass prints 517 them. */ 518 519 /* Make sure the entire insn is loaded into insn_value, if it 520 can fit. */ 521 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && 522 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 523 { 524 unsigned long full_insn_value; 525 int rc = read_insn (cd, pc, info, buf, 526 CGEN_INSN_BITSIZE (insn) / 8, 527 & ex_info, & full_insn_value); 528 if (rc != 0) 529 return rc; 530 length = CGEN_EXTRACT_FN (cd, insn) 531 (cd, insn, &ex_info, full_insn_value, &fields, pc); 532 } 533 else 534 length = CGEN_EXTRACT_FN (cd, insn) 535 (cd, insn, &ex_info, insn_value_cropped, &fields, pc); 536 537 /* Length < 0 -> error. */ 538 if (length < 0) 539 return length; 540 if (length > 0) 541 { 542 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); 543 /* Length is in bits, result is in bytes. */ 544 return length / 8; 545 } 546 } 547 548 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 549 } 550 551 return 0; 552 } 553 554 /* Default value for CGEN_PRINT_INSN. 555 The result is the size of the insn in bytes or zero for an unknown insn 556 or -1 if an error occured fetching bytes. */ 557 558 #ifndef CGEN_PRINT_INSN 559 #define CGEN_PRINT_INSN default_print_insn 560 #endif 561 562 static int 563 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) 564 { 565 bfd_byte buf[CGEN_MAX_INSN_SIZE]; 566 int buflen; 567 int status; 568 569 /* Attempt to read the base part of the insn. */ 570 buflen = cd->base_insn_bitsize / 8; 571 status = (*info->read_memory_func) (pc, buf, buflen, info); 572 573 /* Try again with the minimum part, if min < base. */ 574 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) 575 { 576 buflen = cd->min_insn_bitsize / 8; 577 status = (*info->read_memory_func) (pc, buf, buflen, info); 578 } 579 580 if (status != 0) 581 { 582 (*info->memory_error_func) (status, pc, info); 583 return -1; 584 } 585 586 return print_insn (cd, pc, info, buf, buflen); 587 } 588 589 /* Main entry point. 590 Print one instruction from PC on INFO->STREAM. 591 Return the size of the instruction (in bytes). */ 592 593 typedef struct cpu_desc_list 594 { 595 struct cpu_desc_list *next; 596 CGEN_BITSET *isa; 597 int mach; 598 int endian; 599 CGEN_CPU_DESC cd; 600 } cpu_desc_list; 601 602 int 603 print_insn_mt (bfd_vma pc, disassemble_info *info) 604 { 605 static cpu_desc_list *cd_list = 0; 606 cpu_desc_list *cl = 0; 607 static CGEN_CPU_DESC cd = 0; 608 static CGEN_BITSET *prev_isa; 609 static int prev_mach; 610 static int prev_endian; 611 int length; 612 CGEN_BITSET *isa; 613 int mach; 614 int endian = (info->endian == BFD_ENDIAN_BIG 615 ? CGEN_ENDIAN_BIG 616 : CGEN_ENDIAN_LITTLE); 617 enum bfd_architecture arch; 618 619 /* ??? gdb will set mach but leave the architecture as "unknown" */ 620 #ifndef CGEN_BFD_ARCH 621 #define CGEN_BFD_ARCH bfd_arch_mt 622 #endif 623 arch = info->arch; 624 if (arch == bfd_arch_unknown) 625 arch = CGEN_BFD_ARCH; 626 627 /* There's no standard way to compute the machine or isa number 628 so we leave it to the target. */ 629 #ifdef CGEN_COMPUTE_MACH 630 mach = CGEN_COMPUTE_MACH (info); 631 #else 632 mach = info->mach; 633 #endif 634 635 #ifdef CGEN_COMPUTE_ISA 636 { 637 static CGEN_BITSET *permanent_isa; 638 639 if (!permanent_isa) 640 permanent_isa = cgen_bitset_create (MAX_ISAS); 641 isa = permanent_isa; 642 cgen_bitset_clear (isa); 643 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); 644 } 645 #else 646 isa = info->insn_sets; 647 #endif 648 649 /* If we've switched cpu's, try to find a handle we've used before */ 650 if (cd 651 && (cgen_bitset_compare (isa, prev_isa) != 0 652 || mach != prev_mach 653 || endian != prev_endian)) 654 { 655 cd = 0; 656 for (cl = cd_list; cl; cl = cl->next) 657 { 658 if (cgen_bitset_compare (cl->isa, isa) == 0 && 659 cl->mach == mach && 660 cl->endian == endian) 661 { 662 cd = cl->cd; 663 prev_isa = cd->isas; 664 break; 665 } 666 } 667 } 668 669 /* If we haven't initialized yet, initialize the opcode table. */ 670 if (! cd) 671 { 672 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); 673 const char *mach_name; 674 675 if (!arch_type) 676 abort (); 677 mach_name = arch_type->printable_name; 678 679 prev_isa = cgen_bitset_copy (isa); 680 prev_mach = mach; 681 prev_endian = endian; 682 cd = mt_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, 683 CGEN_CPU_OPEN_BFDMACH, mach_name, 684 CGEN_CPU_OPEN_ENDIAN, prev_endian, 685 CGEN_CPU_OPEN_END); 686 if (!cd) 687 abort (); 688 689 /* Save this away for future reference. */ 690 cl = xmalloc (sizeof (struct cpu_desc_list)); 691 cl->cd = cd; 692 cl->isa = prev_isa; 693 cl->mach = mach; 694 cl->endian = endian; 695 cl->next = cd_list; 696 cd_list = cl; 697 698 mt_cgen_init_dis (cd); 699 } 700 701 /* We try to have as much common code as possible. 702 But at this point some targets need to take over. */ 703 /* ??? Some targets may need a hook elsewhere. Try to avoid this, 704 but if not possible try to move this hook elsewhere rather than 705 have two hooks. */ 706 length = CGEN_PRINT_INSN (cd, pc, info); 707 if (length > 0) 708 return length; 709 if (length < 0) 710 return -1; 711 712 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); 713 return cd->default_insn_bitsize / 8; 714 } 715
