| /external/valgrind/coregrind/m_syswrap/ |
| syswrap-amd64-darwin.c | 67 VexGuestAMD64State *vex)
69 mach->__rax = vex->guest_RAX;
70 mach->__rbx = vex->guest_RBX;
71 mach->__rcx = vex->guest_RCX;
72 mach->__rdx = vex->guest_RDX;
73 mach->__rdi = vex->guest_RDI;
74 mach->__rsi = vex->guest_RSI;
75 mach->__rbp = vex->guest_RBP;
76 mach->__rsp = vex->guest_RSP;
77 mach->__rflags = LibVEX_GuestAMD64_get_rflags(vex);
124 VexGuestAMD64State *vex = (VexGuestAMD64State *)vex_generic; local
218 VexGuestAMD64State *vex = (VexGuestAMD64State *)vex_generic; local
341 VexGuestAMD64State *vex = &tst->arch.vex; local
436 VexGuestAMD64State *vex; local
[all...] |
| syswrap-x86-darwin.c | 65 VexGuestX86State *vex)
67 mach->__eax = vex->guest_EAX;
68 mach->__ebx = vex->guest_EBX;
69 mach->__ecx = vex->guest_ECX;
70 mach->__edx = vex->guest_EDX;
71 mach->__edi = vex->guest_EDI;
72 mach->__esi = vex->guest_ESI;
73 mach->__ebp = vex->guest_EBP;
74 mach->__esp = vex->guest_ESP;
75 mach->__ss = vex->guest_SS
100 VexGuestX86State *vex = (VexGuestX86State *)vex_generic; local
155 VexGuestX86State *vex = (VexGuestX86State *)vex_generic; local
281 VexGuestX86State *vex = &tst->arch.vex; local
384 VexGuestX86State *vex; local
[all...] |
| /external/valgrind/coregrind/m_sigframe/ |
| sigframe-amd64-darwin.c | 65 VexGuestAMD64State vex; member in struct:hacky_sigframe
79 Vex guest state. NOTE: does not fill in the FP or SSE
92 # define SC2(reg,REG) uc->__mcontext_data.__ss.reg = tst->arch.vex.guest_##REG
110 uc->__mcontext_data.__ss.__rflags = LibVEX_GuestAMD64_get_rflags(&tst->arch.vex);
120 # define SC2(REG,reg) tst->arch.vex.guest_##REG = uc->__mcontext_data.__ss.reg
179 VG_(memset)(&frame->vex, 0, sizeof(VexGuestAMD64State));
186 frame->vex = tst->arch.vex;
212 tst->arch.vex.guest_RDI = (ULong) sigNo;
213 tst->arch.vex.guest_RSI = (Addr) &frame->fake_siginfo
[all...] |
| sigframe-x86-darwin.c | 68 VexGuestX86State vex; member in struct:hacky_sigframe
83 Vex guest state. NOTE: does not fill in the FP or SSE
96 # define SC2(reg,REG) uc->__mcontext_data.__ss.reg = tst->arch.vex.guest_##REG
106 uc->__mcontext_data.__ss.__eflags = LibVEX_GuestX86_get_eflags(&tst->arch.vex);
116 # define SC2(REG,reg) tst->arch.vex.guest_##REG = uc->__mcontext_data.__ss.reg
167 VG_(memset)(&frame->vex, 0, sizeof(VexGuestX86State));
174 frame->vex = tst->arch.vex;
244 tst->arch.vex = frame->vex;
[all...] |
| sigframe-amd64-linux.c | 103 VexGuestAMD64State vex; member in struct:vg_sigframe
323 Vex guest state. NOTE: does not fill in the FP or SSE
344 # define SC2(reg,REG) sc->reg = tst->arch.vex.guest_##REG
363 sc->eflags = LibVEX_GuestAMD64_get_rflags(&tst->arch.vex);
388 frame->vex = tst->arch.vex;
439 = (void*)tst->arch.vex.guest_RIP;
477 tst->arch.vex.guest_RIP = (Addr) handler;
478 tst->arch.vex.guest_RDI = (ULong) siginfo->si_signo;
479 tst->arch.vex.guest_RSI = (Addr) &frame->sigInfo
[all...] |
| sigframe-arm-linux.c | 55 /* This uses the hack of dumping the vex guest state along with both
67 VexGuestARMState vex; member in struct:vg_sig_private
98 # define SC2(reg,REG) sc->arm_##reg = tst->arch.vex.guest_##REG
154 priv->vex = tst->arch.vex;
203 rsf->info._sifields._sigfault._addr = (Addr *) (tst)->arch.vex.guest_R12; /* IP */
210 tst->arch.vex.guest_R1 = (Addr)&rsf->info;
211 tst->arch.vex.guest_R2 = (Addr)&rsf->sig.uc;
221 tst->arch.vex.guest_R0 = sigNo;
224 tst->arch.vex.guest_R14 = (Addr)restorer;
[all...] |
| sigframe-arm64-linux.c | 50 /* This uses the hack of dumping the vex guest state along with both
64 VexGuestARM64State vex; member in struct:vg_sig_private
96 # define SC2(reg) sc->regs[reg] = tst->arch.vex.guest_X##reg
106 sc->sp = tst->arch.vex.guest_XSP;
107 sc->pc = tst->arch.vex.guest_PC;
147 priv->vex = tst->arch.vex;
190 = (Addr*)(tst)->arch.vex.guest_PC;
197 tst->arch.vex.guest_X1 = (Addr)&rsf->info;
198 tst->arch.vex.guest_X2 = (Addr)&rsf->sig.uc
[all...] |
| sigframe-s390x-linux.c | 65 do { zztst->arch.vex.guest_r##zzn = (unsigned long)(zzval); \
106 VexGuestS390XState vex; member in struct:vg_sigframe
147 sigregs->regs.gprs[0] = tst->arch.vex.guest_r0;
148 sigregs->regs.gprs[1] = tst->arch.vex.guest_r1;
149 sigregs->regs.gprs[2] = tst->arch.vex.guest_r2;
150 sigregs->regs.gprs[3] = tst->arch.vex.guest_r3;
151 sigregs->regs.gprs[4] = tst->arch.vex.guest_r4;
152 sigregs->regs.gprs[5] = tst->arch.vex.guest_r5;
153 sigregs->regs.gprs[6] = tst->arch.vex.guest_r6;
154 sigregs->regs.gprs[7] = tst->arch.vex.guest_r7
[all...] |
| sigframe-x86-linux.c | 108 VexGuestX86State vex; member in struct:vg_sigframe
346 Vex guest state. NOTE: does not fill in the FP or SSE
367 # define SC2(reg,REG) sc->reg = tst->arch.vex.guest_##REG
384 sc->eflags = LibVEX_GuestX86_get_eflags(&tst->arch.vex);
407 frame->vex = tst->arch.vex;
522 = (void*)tst->arch.vex.guest_EIP;
563 tst->arch.vex.guest_EIP = (Addr) handler;
570 esp, tst->arch.vex.guest_EIP, (Int)tst->status);
599 tst->arch.vex = frame->vex
[all...] |
| /external/valgrind/coregrind/ |
| pub_core_threadstate.h | 91 /* --- BEGIN vex-mandated guest state --- */
100 VexGuestArchState vex __attribute__((aligned(LibVEX_GUEST_STATE_ALIGN))); member in struct:__anon25324
112 /* --- END vex-mandated guest state --- */
280 register is assumed to be always zero and vex->guest_FS_CONST holds
|
| m_machine.c | 44 #define INSTR_PTR(regs) ((regs).vex.VG_INSTR_PTR)
45 #define STACK_PTR(regs) ((regs).vex.VG_STACK_PTR)
46 #define FRAME_PTR(regs) ((regs).vex.VG_FRAME_PTR)
69 regs->r_pc = (ULong)VG_(threads)[tid].arch.vex.guest_EIP;
70 regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_ESP;
72 = VG_(threads)[tid].arch.vex.guest_EBP;
74 regs->r_pc = VG_(threads)[tid].arch.vex.guest_RIP;
75 regs->r_sp = VG_(threads)[tid].arch.vex.guest_RSP;
77 = VG_(threads)[tid].arch.vex.guest_RBP;
79 regs->r_pc = (ULong)VG_(threads)[tid].arch.vex.guest_CIA
193 VexGuestArchState* vex = &(VG_(get_ThreadState)(tid)->arch.vex); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-i386.c | 232 /* VEX prefix. */
235 /* VEX prefix is either 2 byte or 3 byte. EVEX is 4 byte. */
332 vex_prefix vex; member in struct:_i386_insn
598 /* Encode SSE instructions with VEX prefix. */
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| i386-opc.h | 404 /* insn has VEX prefix:
405 1: 128bit VEX prefix.
406 2: 256bit VEX prefix.
407 3: Scalar VEX prefix.
412 Vex,
413 /* How to encode VEX.vvvv:
414 0: VEX.vvvv must be 1111b.
415 1: VEX.NDS. Register-only source is encoded in VEX.vvvv where
417 VEX.DDS. The second register operand is encoded in VEX.vvv
587 unsigned int vex:2; member in struct:i386_opcode_modifier
[all...] |
| i386-dis.c | 397 #define Vex { OP_VEX, vex_mode }
517 VEX.W. */
559 /* normal vex mode */
561 /* 128bit vex mode */
563 /* 256bit vex mode */
565 /* operand size depends on the VEX.W bit. */
3117 vex; variable in typeref:struct:__anon75940
[all...] |
| /prebuilts/tools/common/m2/repository/net/sourceforge/saxon/saxon/9.1.0.8/ |
| saxon-9.1.0.8.jar | |
