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      1 /* tc-xtensa.h -- Header file for tc-xtensa.c.
      2    Copyright (C) 2003-2014 Free Software Foundation, Inc.
      3 
      4    This file is part of GAS, the GNU Assembler.
      5 
      6    GAS is free software; you can redistribute it and/or modify
      7    it under the terms of the GNU General Public License as published by
      8    the Free Software Foundation; either version 3, or (at your option)
      9    any later version.
     10 
     11    GAS is distributed in the hope that it will be useful,
     12    but WITHOUT ANY WARRANTY; without even the implied warranty of
     13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14    GNU General Public License for more details.
     15 
     16    You should have received a copy of the GNU General Public License
     17    along with GAS; see the file COPYING.  If not, write to the Free
     18    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
     19    02110-1301, USA.  */
     20 
     21 #ifndef TC_XTENSA
     22 #define TC_XTENSA 1
     23 
     24 struct fix;
     25 
     26 #ifndef OBJ_ELF
     27 #error Xtensa support requires ELF object format
     28 #endif
     29 
     30 #include "xtensa-isa.h"
     31 #include "xtensa-config.h"
     32 
     33 #define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
     34 
     35 
     36 /* Maximum number of opcode slots in a VLIW instruction.  */
     37 #define MAX_SLOTS 15
     38 
     39 
     40 /* For all xtensa relax states except RELAX_DESIRE_ALIGN and
     41    RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
     42    in the fr_var field.  For the two exceptions, fr_var is a float value
     43    that records the frequency with which the following instruction is
     44    executed as a branch target.  The aligner uses this information to
     45    tell which targets are most important to be aligned.  */
     46 
     47 enum xtensa_relax_statesE
     48 {
     49   RELAX_XTENSA_NONE,
     50 
     51   RELAX_ALIGN_NEXT_OPCODE,
     52   /* Use the first opcode of the next fragment to determine the
     53      alignment requirements.  This is ONLY used for LOOPs currently.  */
     54 
     55   RELAX_CHECK_ALIGN_NEXT_OPCODE,
     56   /* The next non-empty frag contains a loop instruction.  Check to see
     57      if it is correctly aligned, but do not align it.  */
     58 
     59   RELAX_DESIRE_ALIGN_IF_TARGET,
     60   /* These are placed in front of labels and converted to either
     61      RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
     62      relaxation begins.  */
     63 
     64   RELAX_ADD_NOP_IF_A0_B_RETW,
     65   /* These are placed in front of conditional branches.  Before
     66      relaxation begins, they are turned into either NOPs for branches
     67      immediately followed by RETW or RETW.N or rs_fills of 0.  This is
     68      used to avoid a hardware bug in some early versions of the
     69      processor.  */
     70 
     71   RELAX_ADD_NOP_IF_PRE_LOOP_END,
     72   /* These are placed after JX instructions.  Before relaxation begins,
     73      they are turned into either NOPs, if the JX is one instruction
     74      before a loop end label, or rs_fills of 0.  This is used to avoid a
     75      hardware interlock issue prior to Xtensa version T1040.  */
     76 
     77   RELAX_ADD_NOP_IF_SHORT_LOOP,
     78   /* These are placed after LOOP instructions and turned into NOPs when:
     79      (1) there are less than 3 instructions in the loop; we place 2 of
     80      these in a row to add up to 2 NOPS in short loops; or (2) the
     81      instructions in the loop do not include a branch or jump.
     82      Otherwise they are turned into rs_fills of 0 before relaxation
     83      begins.  This is used to avoid hardware bug PR3830.  */
     84 
     85   RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
     86   /* These are placed after LOOP instructions and turned into NOPs if
     87      there are less than 12 bytes to the end of some other loop's end.
     88      Otherwise they are turned into rs_fills of 0 before relaxation
     89      begins.  This is used to avoid hardware bug PR3830.  */
     90 
     91   RELAX_DESIRE_ALIGN,
     92   /* The next fragment would like its first instruction to NOT cross an
     93      instruction fetch boundary.  */
     94 
     95   RELAX_MAYBE_DESIRE_ALIGN,
     96   /* The next fragment might like its first instruction to NOT cross an
     97      instruction fetch boundary.  These are placed after a branch that
     98      might be relaxed.  If the branch is relaxed, then this frag will be
     99      a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
    100      frag.  */
    101 
    102   RELAX_LOOP_END,
    103   /* This will be turned into a NOP or NOP.N if the previous instruction
    104      is expanded to negate a loop.  */
    105 
    106   RELAX_LOOP_END_ADD_NOP,
    107   /* When the code density option is available, this will generate a
    108      NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
    109      fragment with a NOP in it.  Once a frag has been converted to
    110      RELAX_LOOP_END_ADD_NOP, it should never be changed back to
    111      RELAX_LOOP_END.  */
    112 
    113   RELAX_LITERAL,
    114   /* Another fragment could generate an expansion here but has not yet.  */
    115 
    116   RELAX_LITERAL_NR,
    117   /* Expansion has been generated by an instruction that generates a
    118      literal.  However, the stretch has NOT been reported yet in this
    119      fragment.  */
    120 
    121   RELAX_LITERAL_FINAL,
    122   /* Expansion has been generated by an instruction that generates a
    123      literal.  */
    124 
    125   RELAX_LITERAL_POOL_BEGIN,
    126   RELAX_LITERAL_POOL_END,
    127   /* Technically these are not relaxations at all but mark a location
    128      to store literals later.  Note that fr_var stores the frchain for
    129      BEGIN frags and fr_var stores now_seg for END frags.  */
    130 
    131   RELAX_NARROW,
    132   /* The last instruction in this fragment (at->fr_opcode) can be
    133      freely replaced with a single wider instruction if a future
    134      alignment desires or needs it.  */
    135 
    136   RELAX_IMMED,
    137   /* The last instruction in this fragment (at->fr_opcode) contains
    138      an immediate or symbol.  If the value does not fit, relax the
    139      opcode using expansions from the relax table.  */
    140 
    141   RELAX_IMMED_STEP1,
    142   /* The last instruction in this fragment (at->fr_opcode) contains a
    143      literal.  It has already been expanded 1 step.  */
    144 
    145   RELAX_IMMED_STEP2,
    146   /* The last instruction in this fragment (at->fr_opcode) contains a
    147      literal.  It has already been expanded 2 steps.  */
    148 
    149   RELAX_IMMED_STEP3,
    150   /* The last instruction in this fragment (at->fr_opcode) contains a
    151      literal.  It has already been expanded 3 steps.  */
    152 
    153   RELAX_SLOTS,
    154   /* There are instructions within the last VLIW instruction that need
    155      relaxation.  Find the relaxation based on the slot info in
    156      xtensa_frag_type.  Relaxations that deal with particular opcodes
    157      are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
    158      that deal with entire instructions, such as alignment, are not
    159      slot-based.  */
    160 
    161   RELAX_FILL_NOP,
    162   /* This marks the location of a pipeline stall.  We can fill these guys
    163      in for alignment of any size.  */
    164 
    165   RELAX_UNREACHABLE,
    166   /* This marks the location as unreachable.  The assembler may widen or
    167      narrow this area to meet alignment requirements of nearby
    168      instructions.  */
    169 
    170   RELAX_MAYBE_UNREACHABLE,
    171   /* This marks the location as possibly unreachable.  These are placed
    172      after a branch that may be relaxed into a branch and jump. If the
    173      branch is relaxed, then this frag will be converted to a
    174      RELAX_UNREACHABLE frag.  */
    175 
    176   RELAX_ORG,
    177   /* This marks the location as having previously been an rs_org frag.
    178      rs_org frags are converted to fill-zero frags immediately after
    179      relaxation.  However, we need to remember where they were so we can
    180      prevent the linker from changing the size of any frag between the
    181      section start and the org frag.  */
    182 
    183   RELAX_TRAMPOLINE,
    184   /* Every few thousand frags, we insert one of these, just in case we may
    185      need some space for a trampoline (jump to a jump) because the function
    186      has gotten too big. If not needed, it disappears. */
    187 
    188   RELAX_NONE
    189 };
    190 
    191 /* This is used as a stopper to bound the number of steps that
    192    can be taken.  */
    193 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
    194 
    195 struct xtensa_frag_type
    196 {
    197   /* Info about the current state of assembly, e.g., transform,
    198      absolute_literals, etc.  These need to be passed to the backend and
    199      then to the object file.
    200 
    201      When is_assembly_state_set is false, the frag inherits some of the
    202      state settings from the previous frag in this segment.  Because it
    203      is not possible to intercept all fragment closures (frag_more and
    204      frag_append_1_char can close a frag), we use a pass after initial
    205      assembly to fill in the assembly states.  */
    206 
    207   unsigned int is_assembly_state_set : 1;
    208   unsigned int is_no_density : 1;
    209   unsigned int is_no_transform : 1;
    210   unsigned int use_longcalls : 1;
    211   unsigned int use_absolute_literals : 1;
    212 
    213   /* Inhibits relaxation of machine-dependent alignment frags the
    214      first time through a relaxation....  */
    215   unsigned int relax_seen : 1;
    216 
    217   /* Information that is needed in the object file and set when known.  */
    218   unsigned int is_literal : 1;
    219   unsigned int is_loop_target : 1;
    220   unsigned int is_branch_target : 1;
    221   unsigned int is_insn : 1;
    222   unsigned int is_unreachable : 1;
    223 
    224   unsigned int is_specific_opcode : 1; /* also implies no_transform */
    225 
    226   unsigned int is_align : 1;
    227   unsigned int is_text_align : 1;
    228   unsigned int alignment : 5;
    229 
    230   /* A frag with this bit set is the first in a loop that actually
    231      contains an instruction.  */
    232   unsigned int is_first_loop_insn : 1;
    233 
    234   /* A frag with this bit set is a branch that we are using to
    235      align branch targets as if it were a normal narrow instruction.  */
    236   unsigned int is_aligning_branch : 1;
    237 
    238   /* For text fragments that can generate literals at relax time, this
    239      variable points to the frag where the literal will be stored.  For
    240      literal frags, this variable points to the nearest literal pool
    241      location frag.  This literal frag will be moved to after this
    242      location.  For RELAX_LITERAL_POOL_BEGIN frags, this field points
    243      to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
    244      frag, to make moving frags for this literal pool efficient.  */
    245   fragS *literal_frag;
    246 
    247   /* The destination segment for literal frags.  (Note that this is only
    248      valid after xtensa_move_literals.)  This field is also used for
    249      LITERAL_POOL_END frags.  */
    250   segT lit_seg;
    251 
    252   /* Frag chain for LITERAL_POOL_BEGIN frags.  */
    253   struct frchain *lit_frchain;
    254 
    255   /* For the relaxation scheme, some literal fragments can have their
    256      expansions modified by an instruction that relaxes.  */
    257   int text_expansion[MAX_SLOTS];
    258   int literal_expansion[MAX_SLOTS];
    259   int unreported_expansion;
    260 
    261   /* For slots that have a free register for relaxation, record that
    262      register.  */
    263   expressionS free_reg[MAX_SLOTS];
    264 
    265   /* For text fragments that can generate literals at relax time:  */
    266   fragS *literal_frags[MAX_SLOTS];
    267   enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
    268   symbolS *slot_symbols[MAX_SLOTS];
    269   offsetT slot_offsets[MAX_SLOTS];
    270 
    271   /* When marking frags after this one in the chain as no transform,
    272      cache the last one in the chain, so that we can skip to the
    273      end of the chain.  */
    274   fragS *no_transform_end;
    275 };
    276 
    277 
    278 /* For VLIW support, we need to know what slot a fixup applies to.  */
    279 typedef struct xtensa_fix_data_struct
    280 {
    281   int slot;
    282   symbolS *X_add_symbol;
    283   offsetT X_add_number;
    284 } xtensa_fix_data;
    285 
    286 
    287 /* Structure to record xtensa-specific symbol information.  */
    288 typedef struct xtensa_symfield_type
    289 {
    290   unsigned int is_loop_target : 1;
    291   unsigned int is_branch_target : 1;
    292   symbolS *next_expr_symbol;
    293 } xtensa_symfield_type;
    294 
    295 
    296 /* Structure for saving information about a block of property data
    297    for frags that have the same flags.   The forward reference is
    298    in this header file.  The actual definition is in tc-xtensa.c.  */
    299 struct xtensa_block_info_struct;
    300 typedef struct xtensa_block_info_struct xtensa_block_info;
    301 
    302 
    303 /* Property section types.  */
    304 typedef enum
    305 {
    306   xt_literal_sec,
    307   xt_prop_sec,
    308   max_xt_sec
    309 } xt_section_type;
    310 
    311 typedef struct xtensa_segment_info_struct
    312 {
    313   fragS *literal_pool_loc;
    314   xtensa_block_info *blocks[max_xt_sec];
    315 } xtensa_segment_info;
    316 
    317 
    318 extern const char *xtensa_target_format (void);
    319 extern void xtensa_init_fix_data (struct fix *);
    320 extern void xtensa_frag_init (fragS *);
    321 extern int xtensa_force_relocation (struct fix *);
    322 extern int xtensa_validate_fix_sub (struct fix *);
    323 extern void xtensa_frob_label (struct symbol *);
    324 extern void xtensa_end (void);
    325 extern void xtensa_post_relax_hook (void);
    326 extern void xtensa_file_arch_init (bfd *);
    327 extern void xtensa_flush_pending_output (void);
    328 extern bfd_boolean xtensa_fix_adjustable (struct fix *);
    329 extern void xtensa_symbol_new_hook (symbolS *);
    330 extern long xtensa_relax_frag (fragS *, long, int *);
    331 extern void xtensa_elf_section_change_hook (void);
    332 extern int xtensa_unrecognized_line (int);
    333 extern bfd_boolean xtensa_check_inside_bundle (void);
    334 extern void xtensa_handle_align (fragS *);
    335 extern char *xtensa_section_rename (char *);
    336 
    337 #define TARGET_FORMAT			xtensa_target_format ()
    338 #define TARGET_ARCH			bfd_arch_xtensa
    339 #define TC_SEGMENT_INFO_TYPE		xtensa_segment_info
    340 #define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
    341 #define TC_FIX_TYPE			xtensa_fix_data
    342 #define TC_INIT_FIX_DATA(x)		xtensa_init_fix_data (x)
    343 #define TC_FRAG_TYPE			struct xtensa_frag_type
    344 #define TC_FRAG_INIT(frag)		xtensa_frag_init (frag)
    345 #define TC_FORCE_RELOCATION(fix)	xtensa_force_relocation (fix)
    346 #define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
    347   (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
    348 #define	TC_VALIDATE_FIX_SUB(fix, seg)	xtensa_validate_fix_sub (fix)
    349 #define NO_PSEUDO_DOT			xtensa_check_inside_bundle ()
    350 #define tc_canonicalize_symbol_name(s)	xtensa_section_rename (s)
    351 #define tc_canonicalize_section_name(s)	xtensa_section_rename (s)
    352 #define tc_init_after_args()		xtensa_file_arch_init (stdoutput)
    353 #define tc_fix_adjustable(fix)		xtensa_fix_adjustable (fix)
    354 #define tc_frob_label(sym)		xtensa_frob_label (sym)
    355 #define tc_unrecognized_line(ch)	xtensa_unrecognized_line (ch)
    356 #define tc_symbol_new_hook(sym)		xtensa_symbol_new_hook (sym)
    357 #define md_do_align(a,b,c,d,e)		xtensa_flush_pending_output ()
    358 #define md_elf_section_change_hook	xtensa_elf_section_change_hook
    359 #define md_end				xtensa_end
    360 #define md_flush_pending_output()	xtensa_flush_pending_output ()
    361 #define md_operand(x)
    362 #define TEXT_SECTION_NAME		xtensa_section_rename (".text")
    363 #define DATA_SECTION_NAME		xtensa_section_rename (".data")
    364 #define BSS_SECTION_NAME		xtensa_section_rename (".bss")
    365 #define HANDLE_ALIGN(fragP)		xtensa_handle_align (fragP)
    366 #define MAX_MEM_FOR_RS_ALIGN_CODE	1
    367 
    368 
    369 /* The renumber_section function must be mapped over all the sections
    370    after calling xtensa_post_relax_hook.  That function is static in
    371    write.c so it cannot be called from xtensa_post_relax_hook itself.  */
    372 
    373 #define md_post_relax_hook \
    374   do \
    375     { \
    376       int i = 0; \
    377       xtensa_post_relax_hook (); \
    378       bfd_map_over_sections (stdoutput, renumber_sections, &i); \
    379     } \
    380   while (0)
    381 
    382 
    383 /* Because xtensa relaxation can insert a new literal into the middle of
    384    fragment and thus require re-running the relaxation pass on the
    385    section, we need an explicit flag here.  We explicitly use the name
    386    "stretched" here to avoid changing the source code in write.c.  */
    387 
    388 #define md_relax_frag(segment, fragP, stretch) \
    389   xtensa_relax_frag (fragP, stretch, &stretched)
    390 
    391 /* Only allow call frame debug info optimization when linker relaxation is
    392    not enabled as otherwise we could generate the DWARF directives without
    393    the relocs necessary to patch them up.  */
    394 #define md_allow_eh_opt (linkrelax == 0)
    395 
    396 #define LOCAL_LABELS_FB 1
    397 #define WORKING_DOT_WORD 1
    398 #define DOUBLESLASH_LINE_COMMENTS
    399 #define TC_HANDLES_FX_DONE
    400 #define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
    401 #define TC_LINKRELAX_FIXUP(SEG) 0
    402 #define MD_APPLY_SYM_VALUE(FIX) 0
    403 #define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
    404 
    405 /* Use line number format that is amenable to linker relaxation.  */
    406 #define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
    407 
    408 
    409 /* Resource reservation info functions.  */
    410 
    411 /* Returns the number of copies of a particular unit.  */
    412 typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);
    413 
    414 /* Returns the number of units the opcode uses.  */
    415 typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
    416 
    417 /* Given an opcode and an index into the opcode's funcUnit list,
    418    returns the unit used for the index.  */
    419 typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
    420 
    421 /* Given an opcode and an index into the opcode's funcUnit list,
    422    returns the cycle during which the unit is used.  */
    423 typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
    424 
    425 /* The above typedefs parameterize the resource_table so that the
    426    optional scheduler doesn't need its own resource reservation system.
    427 
    428    For simple resource checking, which is all that happens normally,
    429    the functions will be as follows (with some wrapping to make the
    430    interface more convenient):
    431 
    432    unit_num_copies_func = xtensa_funcUnit_num_copies
    433    opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
    434    opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
    435    opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
    436 
    437    Of course the optional scheduler has its own reservation table
    438    and functions.  */
    439 
    440 int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
    441 int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
    442 
    443 typedef struct
    444 {
    445   void *data;
    446   int cycles;
    447   int allocated_cycles;
    448   int num_units;
    449   unit_num_copies_func unit_num_copies;
    450   opcode_num_units_func opcode_num_units;
    451   opcode_funcUnit_use_unit_func opcode_unit_use;
    452   opcode_funcUnit_use_stage_func opcode_unit_stage;
    453   unsigned char **units;
    454 } resource_table;
    455 
    456 resource_table *new_resource_table
    457   (void *, int, int, unit_num_copies_func, opcode_num_units_func,
    458    opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
    459 void resize_resource_table (resource_table *, int);
    460 void clear_resource_table (resource_table *);
    461 bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
    462 void reserve_resources (resource_table *, xtensa_opcode, int);
    463 void release_resources (resource_table *, xtensa_opcode, int);
    464 
    465 #endif /* TC_XTENSA */
    466