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    Searched refs:DemandedMask (Results 1 - 7 of 7) sorted by null

  /external/llvm/lib/Transforms/InstCombine/
InstCombineSimplifyDemanded.cpp 58 APInt DemandedMask(APInt::getAllOnesValue(BitWidth));
60 Value *V = SimplifyDemandedUseBits(&Inst, DemandedMask, KnownZero, KnownOne,
71 bool InstCombiner::SimplifyDemandedBits(Use &U, APInt DemandedMask,
75 Value *NewVal = SimplifyDemandedUseBits(U.get(), DemandedMask, KnownZero,
85 /// that only the bits set in DemandedMask of the result of V are ever used
96 /// in DemandedMask. Note also that the bitwidth of V, DemandedMask, KnownZero
104 Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
110 uint32_t BitWidth = DemandedMask.getBitWidth();
116 "Value *V, DemandedMask, KnownZero and KnownOne
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InstCombineInternal.h 515 Value *SimplifyDemandedUseBits(Value *V, APInt DemandedMask, APInt &KnownZero,
518 bool SimplifyDemandedBits(Use &U, APInt DemandedMask, APInt &KnownZero,
523 APInt DemandedMask, APInt &KnownZero,
InstCombineVectorOps.cpp 156 APInt DemandedMask(VectorWidth, 0);
157 DemandedMask.setBit(IndexVal);
158 if (Value *V = SimplifyDemandedVectorElts(EI.getOperand(0), DemandedMask,
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  /external/llvm/lib/Target/XCore/
XCoreISelLowering.cpp     [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp 381 /// DemandedMask bits of the result of Op are ever used downstream. If we can
386 /// only be accurate for those bits in the DemandedMask.
388 const APInt &DemandedMask,
393 unsigned BitWidth = DemandedMask.getBitWidth();
396 APInt NewMask = DemandedMask;
414 } else if (DemandedMask == 0) {
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  /external/llvm/include/llvm/Target/
TargetLowering.h     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp     [all...]

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