| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| BasicTTIImpl.h | 499 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
|
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 182 // There are no 64-bit extloads. These should be done as a 32-bit extload and
185 setLoadExtAction(ISD::EXTLOAD, MVT::i64, VT, Expand);
191 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Expand);
194 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand);
197 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Expand);
200 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i16, Expand);
222 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
223 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand);
224 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand);
225 setLoadExtAction(ISD::EXTLOAD, MVT::v8f32, MVT::v8f16, Expand)
[all...] |
| SIISelLowering.cpp | 149 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
150 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Legal);
151 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Legal);
152 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand);
161 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
163 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f16, Expand);
164 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f32, Expand);
562 ExtTy = ISD::EXTLOAD;
[all...] |
| R600ISelLowering.cpp | 131 // EXTLOAD should be the same as ZEXTLOAD. It is legal for some address
142 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
143 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i8, Custom);
144 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i16, Custom);
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 183 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand);
186 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD})
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 209 // Turn FP extload into load/fextend
210 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
211 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
212 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand);
213 setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, MVT::v2f16, Expand);
214 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f16, Expand);
215 setLoadExtAction(ISD::EXTLOAD, MVT::v2f64, MVT::v2f32, Expand);
216 setLoadExtAction(ISD::EXTLOAD, MVT::v4f32, MVT::v4f16, Expand);
217 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f16, Expand);
218 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f32, Expand)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 270 // Only do this if the target has a native EXTLOAD instruction from
272 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) &&
286 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx,
387 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
506 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr,
607 // with a "move to register" or "extload into register" instruction, then
[all...] |
| LegalizeVectorOps.cpp | 545 ScalarLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, WideVT, Chain, BasePTR,
599 case ISD::EXTLOAD:
[all...] |
| SelectionDAGDumper.cpp | 501 case ISD::EXTLOAD: OS << ", anyext"; break;
|
| DAGCombiner.cpp | 205 void ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad);
215 SDValue Trunc, SDValue ExtLoad, SDLoc DL,
424 /// true if the (and (load x) c) pattern matches an extload. ExtVT returns
[all...] |
| LegalizeIntegerTypes.cpp | 474 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType();
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 129 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
471 SDValue High = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 240 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
248 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
249 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
256 setLoadExtAction(ISD::EXTLOAD, VT, F16VT, Expand);
420 setLoadExtAction(ISD::EXTLOAD, MVT::i64, MVT::i32, Custom);
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 151 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| HexagonISelDAGToDAG.cpp | 381 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 81 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 389 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand);
390 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand);
391 setLoadExtAction(ISD::EXTLOAD, MVT::f80, MVT::f16, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 431 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
432 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
433 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f64, Expand);
434 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f80, Expand);
611 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
679 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT.getSimpleVT(), Expand);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 243 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
276 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
415 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f80, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 494 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
672 setLoadExtAction(ISD::EXTLOAD, MVT::v4f64, MVT::v4f32, Custom);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 449 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
630 // It is legal to extload from v4i8 to v4i16 or v4i32.
634 setLoadExtAction(ISD::EXTLOAD, VT, Ty, Legal);
689 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
690 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
[all...] |
