| /external/v8/test/unittests/compiler/ |
| register-allocator-unittest.cc | 368 EmitI(Reg(values[0], 0));
393 EmitI(Reg(values[0]), Reg(values[1]));
512 EmitI(Reg(values[i], static_cast<int>(i)));
558 EmitI(Reg(c));
559 EmitI(Reg(to_spill));
751 EmitI(Slot(p_0), Reg(p_0));
754 EmitI(Slot(p_0));
757 EmitI(Reg(p_0));
758 EmitI(Slot(p_0));
761 EmitI(Slot(p_0))
[all...] |
| instruction-sequence-unittest.h | 154 Instruction* EmitI(size_t input_size, TestOperand* inputs);
155 Instruction* EmitI(TestOperand input_op_0 = TestOperand(),
|
| instruction-sequence-unittest.cc | 223 Instruction* InstructionSequenceTest::EmitI(size_t input_size,
230 Instruction* InstructionSequenceTest::EmitI(TestOperand input_op_0,
235 return EmitI(CountInputs(arraysize(inputs), inputs), inputs);
|
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 138 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) {
191 EmitI(0x9, rs, rt, imm16);
287 EmitI(0xc, rs, rt, imm16);
295 EmitI(0xd, rs, rt, imm16);
303 EmitI(0xe, rs, rt, imm16);
418 EmitI(0x20, rs, rt, imm16);
422 EmitI(0x21, rs, rt, imm16);
426 EmitI(0x23, rs, rt, imm16);
431 EmitI(0x22, rs, rt, imm16);
436 EmitI(0x26, rs, rt, imm16)
[all...] |
| assembler_mips.h | 764 void EmitI(int opcode, Register rs, Register rt, uint16_t imm);
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 131 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) {
184 EmitI(0x9, rs, rt, imm16);
192 EmitI(0x19, rs, rt, imm16);
256 EmitI(0xc, rs, rt, imm16);
264 EmitI(0xd, rs, rt, imm16);
272 EmitI(0xe, rs, rt, imm16);
322 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x26);
327 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x27);
332 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x36);
337 EmitI(0x1f, base, rt, ((imm9 & 0x1FF) << 7) | 0x37)
[all...] |
| assembler_mips64.h | 678 void EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm);
|
